• ForwardEdge ASIC (a Lockheed Martin Company) (St. Paul, MN)
    …of technology through cutting-edge ASIC designs that redefine industry standards. As an ASIC Design Verification Engineer , you will play a pivotal ... to our customers. Job Overview: We are seeking a highly skilled Sr. Staff/Principal ASIC Design Verification Engineer to lead our verification more
    Upward (07/03/25)
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  • Draper (Cambridge, MA)
    …about Draper, visit www.draper.com. Job Description Summary: We are seeking a Senior Analog/Mixed Signal ASIC Design Engineer to join our team in the Silicon ... of integrated circuits from conceptual phases through detailed design , implementation, verification , test and delivery to...or 0-2 years of experience with a PhD in ASIC Hardware Engineering or related. Additional Job Description: Additional… more
    Upward (07/23/25)
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  • MatX (Mountain View, CA)
    …milestones including design freeze and tapeout Work closely with the verification , DFT and physical design co-owners of the subsystem/block in question ... the largest ML workloads for AGI. MatX is seeking silicon micro-architects and design engineers to join our team as we create best-in-class silicon for… more
    Upward (07/25/25)
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  • Nvidia Corporation (Santa Clara, CA)
    We are now looking for an ASIC Design Efficiency Engineer . NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and ... fully verified, high performance, area and power efficient RTL to achieve design targets. Collaborate with architects, designers, verification and VLSI teams… more
    Upward (07/03/25)
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  • Chelsea Search Group (Richardson, TX)
    Senior Physical Design Engineer Full-time + Benefits Richardson, Texas (onsite/hybrid) US Citizen or US Permanent Resident Responsibilities: *Architect system ... requirements *Collaborate effectively with the full ASIC design implementation team with a Humble,...Intent (UPF/CPF), Power Analysis, IR drop analysis, electromigration, Physical Verification and Sign Off PHYSICAL DESIGN GROUP… more
    Upward (07/26/25)
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  • Syntiant (Redwood City, CA)
    …of $250 million per year, and is looking for an experienced and talented Sr. Staff Physical Design Engineer . As Physical Design Engineer , you will be ... a key player in the ASIC R&D team. You are presented with a unique...timing, noise, IR-Drop and EMIR violations. Experience in physical design verification to debug & fix LVS/DRC/PERC… more
    Upward (07/22/25)
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  • OMNIVISION (Santa Clara, CA)
    design specification and system architecture of SoC CIS products, following ASIC design flow: coding, simulation, synthesis, static timing analysis, formality ... work on enhancing the functionality of the grp_holdip. Conduct design verification and modeling using SVA, Python,...or a related field. Must possess the following skills: ASIC design flow: coding, simulation, synthesis, static… more
    Upward (07/02/25)
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  • Viasat, Inc. (Marlborough, MA)
    …Degree in Electrical Engineering, Computer Engineering or a related field *8+ years FPGA/ ASIC design with UVM verification experience *Foundational knowledge ... in FPGAs. The individual will be responsible for RTL design verification at both the unit and...Micro embedments in MicroChip, etc. *Proven track record to design and implement FPGA/ ASIC modules using Verilog… more
    Upward (07/11/25)
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  • Broadcom, Inc. (San Jose, CA)
    …applications in advanced modulation formats. Experience in integrating the front end design with DV for test methodologies and verification . Providing guidelines ... Verification . Hands on experience in providing guidelines for design constraints generation and evaluating processes for backend development, floorplan,… more
    Upward (07/14/25)
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  • Ethan Alexander Group, Inc. (Cupertino, CA)
    Physical Design Engineer Building AI chips that...is involved in physical design Running Physical Design flows to close blocks, support ASIC ... are hard-coded for individual model architectures. Physical Design Engineer Seeking exceptional PD engineers to join our team. The candidate will be responsible… more
    Upward (06/27/25)
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  • OMNIVISION (Santa Clara, CA)
    …circuit simulation by simulators such as Analog FastSPICE (AFS), Empyrean ALPS and NanoSpice. Design verification such as DRC, LVS, PERC check by using Siemens ... Ansys Totem. Conduct script modification using Perl programming language. Collaborate with Digital Engineer to define and design the analog to digital interface.… more
    Upward (07/21/25)
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  • Marvell Technology, Inc. (Westborough, MA)
    …a place to thrive, learn, and lead. Your Team, Your Impact As a Senior Staff Physical Design Engineer at Marvell Technology, you will be a key part of a highly ... place and route, clock tree synthesis, timing closure, and physical verification . Physical Design Methodologies: Proven experience working with RTL-to-GDS… more
    Upward (07/19/25)
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  • Hudson River Trading (Austin, TX)
    …optimization, debugging and problem solving skills Professional experience (2+ years) in RTL design for FPGA or ASIC Expert SystemVerilog development skills with ... (HRT) creates high performance compute engines using FPGA and ASIC technology to drive low latency trading decisions on...are looking for talented hardware developers to architect and design complex systems on a highly collaborative global team.… more
    Upward (07/03/25)
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  • SpaceX (Redmond, WA)
    …systems from antenna to protocol level. You will be responsible for the design , implementation and verification of the electrical hardware for the satellites ... ultimate goal of enabling human life on Mars. RF/MICROWAVE ENGINEER (STARLINK) At SpaceX, we're leveraging our experience in...providing fast, reliable internet to 4M+ users worldwide. We design , build, test, and operate all parts of the… more
    Upward (07/01/25)
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  • Qualcomm (San Diego, CA)
    …Bachelor's degree in Science, Engineering, or related field. 2+ years ASIC design , FPAG design , verification , or related work experience. 3+ years ... degree in Science, Engineering, or related field and 2+ years of ASIC design , verification , validation, integration, or related work experience. OR Master's… more
    Upward (07/03/25)
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  • ASIC Design Verification

    Cisco (San Jose, CA)
    ASIC Design Verification Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1447177) + Location:San Jose, California, US + Area of ... Work With:** You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely… more
    Cisco (07/19/25)
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  • Senior ASIC Design

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This ... voltage regulation and silicon correlation. + Own the unit and sub-system level verification of various IPs, create functional test plans, and verify using advanced … more
    NVIDIA (06/06/25)
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  • ASIC Engineer , Design

    Meta (Sunnyvale, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
    Meta (07/22/25)
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  • ASIC Engineer , Design

    Meta (Menlo Park, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
    Meta (07/11/25)
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  • ASIC Engineer , Design

    Meta (Menlo Park, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
    Meta (07/11/25)
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