- Juniper Networks (Sunnyvale, CA)
- …signal integrity, EM/IR violations, PV, and complete formal verification. Integrate DFT into physical design, ensuring alignment with overall test strategies and ... preferred. High performance and large chip design experience is preferred. Exposure to DFT is preferred. Proficiency in writing Linux shell scripts in Perl, TCL, and… more
- MatX (Mountain View, CA)
- …silicon milestones including design freeze and tapeout Work closely with the Design, DFT , and other Physical Design co-owners of the subsystem/block in question to ... Engineering or equivalent Minimum 8 years of industry experience in ASIC Physical Design Great interpersonal and communication skills Strong proficiency in… more
- Marvell Technology, Inc. (Burlington, VT)
- …and customer system feedback. *Identify and Address Faults: Utilize a product's DFT solution to explore and bound the operating space, assess points of ... yields and improve quality. *Drive Collaboration: Work closely with customers, design, DFT , operations, and reliability teams to ensure test solutions meet coverage… more
- Tenstorrent (Austin, TX)
- …(PPA). Remain hands-on with timing closure processes and collaborate with RTL, DFT , and physical implementation teams to resolve clocking challenges. Evaluate and ... technology nodes Proven experience owning and delivering CTS for complex, high-performance ASIC or SoC designs. Proficient in using place-and-route (PNR) tools for… more
- Astera Labs (Santa Clara, CA)
- …to improve yields and efficiency. Experience with DFM, Design for Testability ( DFT ), and Design for Assembly (DFA) methodologies. Bill of Material (BOM) structuring ... for generating clear and precise manufacturing documentation. Exposure to ASIC /silicon development and hardware validation processes. We know that creativity… more
- BayOne (Austin, TX)
- …digital designs Verilog expertise is required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT ... , timing analysis & ECO. Knowledge of memory controller u-architecture. Familiarity with different memory technologies like LPDDR4/5, HBM. Knowledge of JEDEC memory standards preferred. Knowledge of AES, ECC, RAS features preferred. Strong communication and… more
- Cisco (Portland, OR)
- ASIC DFT Product Lead Apply (https://jobs.cisco.com/jobs/Login?projectId=1435540) + Location:Portland, Oregon, US + Alternate LocationPortland, OR, USA + Area of ... **Your Impact** : You will be in the Silicon One development organization as an ASIC DFT Product Lead in San Jose, CA with a primary focus on Design-for-Test and… more
- Northrop Grumman (Morrisville, NC)
- …making history. Northrop Grumman Mission Systems, Digital Technologies Group, is seeking an ASIC DFT Engineer to join our team of highly qualified, diverse ... DoD Secret clearance.** **Roles and Responsibilities:** + Responsible for DFT (Design for Testabilty) aspects of ASIC ...for DFT (Design for Testabilty) aspects of ASIC Design thorough understanding of digital design concepts +… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure organization to work on Design for Test ( DFT ) methodologies, implementation, and ... EDA tools and IEEE standards (1149, 1500, 1687). **Required Skills:** ASIC Engineer, DFT Responsibilities: 1. Develop and implement DFT strategies for data… more
- Amazon (Austin, TX)
- …Key job responsibilities * Develop, implement and verify state-of-the-art Design for Test ( DFT ) architectures * Work with block designers to integrate DFT ... Work with physical design team to setup and implement DFT insertion flow * Develop high coverage and cost...insertion flow * Develop high coverage and cost effective DFT methodologies * Perform RTL coding and Verification *… more
- Qualcomm (Santa Clara, CA)
- …in digital ASIC design; experience using Verilog or VHDL + Experience with ASIC test, DFT , and debug + 2+ years of practical experience with test ... create a smarter, connected future for all. As a DFT Engineer you will work with chip architects, chip...designers, implementation engineers and test engineers to verify the DFT and DFD (Design for Debug) architecture, implementation, and… more
- NVIDIA (Santa Clara, CA)
- …yield enhancement and spec validation + Partner with other engineering groups including ASIC , DFT , ATE, silicon validation, fab process, software and quality ... teams to coordinate efforts and resolve silicon issues + Initiate and drive process improvements/preventative actions through root cause analysis + The ideal candidate will always look to improve workflows, products, functions and methodologies while working… more
- Cadence Design Systems, Inc. (Cary, NC)
- …who want to make an impact on the world of technology. We are looking for SoC/ ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An intimate ... testbenches. + Prior 5-15 years of professional experience in SoC/ ASIC Digital Design with focus on Design for Test... Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT… more
- TEKsystems (Cincinnati, OH)
- Description Responsibilities: - Responsible for DFT Design for Testability aspects of ASIC Design thorough understanding of digital design concepts - ... or System Verilog RTL coding and highly proficient in DFT methodologies. - Responsible for operating in a team...required - Experience in full product life cycle of ASIC Design - Experience with Cadence and/or Mentor test… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer - DFX! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the ... NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the… more
- Cisco (San Jose, CA)
- ASIC Engineering Technical Leader - SDC Apply (https://jobs.cisco.com/jobs/Login?projectId=1434557) + Location:San Jose, California, US + Area of InterestEngineer - ... networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a...fullchip SDCs and work with the Physical Design and DFT teams to close fullchip timing in multiple timing… more
- Qualcomm (San Diego, CA)
- …premium Snapdragon chip sets and is seeking Hardware Design engineers with solid ASIC design experience in San Diego, CA. This is a high-level, high-profile ... degree in electrical engineering, or related Sciences + 6+ years of experience in ASIC design + Experience and understanding of ASIC design flow: Architecture,… more
- SpaceX (Bastrop, TX)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end ... (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical...with the Designers to create waivers 6. Perform RTL DFT Analysis and improve the DFT coverage… more
