- Qualcomm (San Diego, CA)
- …is your opportunity to make an impact. Role Overview As an L2 Cache Design Engineer , you will: Drive micro-architecture development for L2 cache subsystems, from ... Develop micro-architecture specifications for L2 cache and related coherency logic. Own RTL design and refinement to meet timing, power, and reliability… more
- WIT Recruiting (San Francisco, CA)
- …across the FPGA stack, ensuring robust performance and scalability. Core FPGA Design : Work on RTL design , simulation, synthesis, timing closure, and ... Overview We are looking for a highly motivated FPGA Design Engineer to contribute to the development...timing closure. Expertise in Verilog, SystemVerilog, or VHDL for RTL design . Proficiency in C or C++… more
- OpenAI (San Francisco, CA)
- Join to apply for the Physical Design Engineer role at OpenAI About The Team OpenAI's Hardware team designs the custom silicon that powers the world's most ... Role We are seeking a highly skilled Silicon Implementation Engineer with deep expertise in physical design ... tools, flows and methodologies Strong understanding of microarchitecture, RTL design , physical design , circuit… more
- OpenAI (San Francisco, CA)
- …physical design tools, flows and methodologies Strong understanding of microarchitecture, RTL design , physical design , circuit design , physical ... Role We are seeking a highly skilled Silicon Implementation Engineer with deep expertise in physical design ...RTL designers to define and execute on physical design strategies. You will develop tools, flows and methodologies… more
- SQL Pager LLC (San Francisco, CA)
- Principal/Senior Staff/Staff GPGPU Design Engineer Client Overview Client is building the first latency optimized SoC for their industry. Using its proven AI ... Responsibilities . We are seeking a dedicated hands-on GPGPU Design Engineer to help develop an GPGPU...micro-architecture definition from given Marketing requirements. ◦ Expert in RTL Logic Design , CDC, RDC, Scan insertion,… more
- Altera (San Jose, CA)
- …building and maintaining the core automation infrastructure that supports Altera's FPGA design flows-from RTL to GDSII. In this senior role, you will drive ... becoming the world's #1 FPGA company!Altera is seeking a **Senior Design Automation Engineer ** to join our Design Methodology Automation and Infrastructure… more
- OpenAI (San Francisco, CA)
- …experience focused on reliability across the chip/platform stack. Hands-on experience with RTL design and DFT is required; physical implementation and/or silicon ... while working closely with software and research partners to co- design hardware tightly integrated with AI models. In addition...the Role We are seeking a highly skilled cross-stack engineer with deep expertise in making ML systems reliable… more
- OpenAI (San Francisco, CA)
- …experience focused on reliability across the chip/platform stack. Hands-on experience with RTL design and DFT is required; physical implementation and/or silicon ... while working closely with software and research partners to co- design hardware tightly integrated with AI models. In addition...The Role We are seeking a highly skilled cross-stack engineer with deep expertise in making ML systems reliable… more
- Cadence Design Systems, Inc. (Austin, TX)
- …develop leaders and innovators who want to make an impact on the world of technology. RTL design engineer to support both MARS and Intel.Designer will be ... and code coverage analysis. Designer will also coordinate with validation and physical design teams for product closure. We're doing work that matters. Help us solve… more
- Amazon (Austin, TX)
- …Qualifications - Bachelor's degree in Electrical Engineering or a related field - 5+ years in RTL design for SOC - 5+ years of VLSI engineering - 5+ years with ... design team, you will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications. - Analyze design ,… more
- Amazon (Austin, TX)
- …Basic Qualifications - BS in Electrical Engineering or related technical field - 5+ years in RTL design for SOC - 5+ years of VLSI engineering - 5+ years with ... design team, you will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications. - Analyze design ,… more
- Texas Instruments (Santa Clara, CA)
- …high-speed SerDes chips both at the circuit level and behavioral level. As a design engineer , you will prepare test methods and specifications, assist in ... groups, providing ideas and collaborative teamwork. **Why TI?** + Engineer your future. We empower our employees to truly...logic design + Strong understanding of ASIC design flow from RTL to GDSII. +… more
- Amazon (Austin, TX)
- …and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, ... to drive architectural feasibility studies, explore power-performance-area tradeoffs for physical design closure - Drive IO/ Core block physical implementation… more
- Microsoft Corporation (Hillsboro, OR)
- …to customers and partners worldwide and we are looking for a **Senior Physical Design Engineer ** to help achieve that mission. The Compute Silicon & ... cloud hardware. We are looking for a **Senior Physical Design Engineer ** with a passion for customer...block, subsystem, and top level. + Coordinate with CAD, RTL / Design teams/DFT, Architecture team, Foundry interface team,… more
- Microsoft Corporation (Hillsboro, OR)
- …to customers and partners worldwide and we are looking for a **Principal Physical Design Engineer ** to help achieve that mission. The Compute Silicon & ... Microsoft cloud hardware.We are looking for a **Principal Physical Design Engineer ** with a passion for customer...Design Planning and partitioning strategies. + Responsible for RTL to GDS implementation in Physical Design … more
- Palo Alto Networks (Santa Clara, CA)
- …Impact** + **Write** clear design and micro-architecture specifications. + ** Design ** SystemVerilog RTL that meets area, performance, and power targets. ... close coverage, and add design -for-debug features. + **Partner** with physical- design teams: review synthesis/timing reports, rewrite RTL to close critical… more
- Amazon (Cupertino, CA)
- … quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, area and ... Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers...power-efficient RTL designs to meet project specifications and targets *… more
- Microsoft Corporation (Hillsboro, OR)
- …will manage and optimize the Cloud infrastructure. We are looking for a **Senior Design for Test (DFT) Engineer ** to join the team. **Responsibilities** + Own ... for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online… more
- Snap Inc. (Vancouver, WA)
- …+ Experience with Siemens' UVM Framework + Experience in emulation + Experience in RTL design + Familiarity with video and display systems, MIPI, AMBA, I2C, ... the world, and have fun together. The Company's three core products are Snapchat (https://www.snapchat.com/) , a visual messaging...learning, and working better together. We're looking for a Design Verification Engineer to join the Spectacles… more
- Actalent (Dallas, TX)
- Job Title: RF Mixed Signal Circuit Design Engineer Job Description We are seeking a Sr. Individual Contributor and technical expert in RF Mixed Signal Circuit ... Design to join our team. This role focuses on...expertise and leadership on programs, collaborating with the Project Engineer to lead the development team in achieving committed… more
