- Samsung Electronics Co., Ltd. (Austin, TX)
- …experience in memory controller micro-architecture and RTL design, owning all sub -blocks of custom memory controller designs. Deep expertise in multiple ... Demonstrated success in driving architecture through RTL design for high-performance digital systems . Strong expertise in Verilog and ASIC design flow, including… more
- BayOne (Austin, TX)
- …Diego - Hybrid 3x per week Job Description Summary Samsung is a world leader in Memory , LCD and System LSI technologies that has the vision and commitment to ... System IP team develops proprietary coherent interconnect and memory controller deployed in many high volume products. Job...background owning and driving the RTL design of various sub -blocks of custom memory controller designs Demonstrated… more
- NVIDIA (Madison, AL)
- …skills are required Ways to stand out from the crowd: + Prior sub - system level verification experience related to memory subsystem is a huge plus + ... We are now looking for a Senior ASIC Design Engineer! NVIDIA is seeking an outstanding...contribute to the design and implementation of a state-of-the-art memory management system with complicated design requirements.… more
- Amazon (Austin, TX)
- …- Have familiarity with accelerator design, interconnects, DMAs, Memory sub - systems , CPU cores, SIMDs, debug and system level architectures - Have a ... and Japan, and customers across all industries. Custom SoCs ( System on Chip) live at the heart of AWS...rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies… more
- Qualcomm (San Diego, CA)
- …Engineer, you will work with Chip Architects to validate the concepts of core and sub - system level micro-architectures. You will work on a selected part of the ... you will plan, design, optimize, verify, and test electronic systems , validate digital/analog designs and develop a comprehensive validation/verification testbench… more
- Broadcom (San Jose, CA)
- …expertise with Interface IP designs. Beneficial areas would include High bandwidth memory (HBM) PHY / controller sub - systems , Ethernet/PCIE/CXL (Physical ... duties: + Functional verification of complex designs, especially external interfacing IPs/ memory controllers. + Responsible for all aspects of verification from test… more
- Samsung Electronics Co., Ltd. (Austin, TX)
- …with a PhD + Strong background owning and driving the RTL design of various sub -blocks of custom memory controller designs + Experience working with memory ... Our Team Our System IP team develops proprietary coherent interconnect and memory controller deployed in many high-volume products. Our team plays a key role in… more
- Meta (Sunnyvale, CA)
- …research silicon to demonstrate and integrate advanced IP and AI accelerators into SOC/ ASIC solutions to enable in- system testing and prototyping. The goal is ... our front-end and back-end digital design efforts at the IP and sub - system levels. From microarchitecture definition and RTL implementation to synthesis… more
- Broadcom (Fort Collins, CO)
- …design backend flows, help define and influence sub - system content for memory interfaces, NOC, processor sub - systems et al. The individual will also ... to aid in overall closure and manufacture of the ASIC with emphasis on low power, optimized area, max....candidate should have a strong understanding of VLSI and ASIC physical design 12+ years of experience w/ a… more
- Samsung Electronics Co., Ltd. (Austin, TX)
- …with a PhD + Strong background owning and driving the RTL design of various sub -blocks of the coherent interconnect or memory controller or LLC for the high ... Our Team Our System IP team develops proprietary coherent interconnect and memory controller deployed in many high-volume products. Our team plays a key role in… more
- Renesas (Austin, TX)
- …IC design flow + Experience in architecting digital designs and writing device-level or sub - system specifications. + **Fluent in Verilog RTL coding and ASIC ... Engineer Job Description Renesas is seeking a talented individual for their memory interface products team. These products primarily serve data centers for AI… more
- Qualcomm (San Diego, CA)
- …architecture team to define micro-architecture for various blocks of Hexagon DSP core and sub - system + Develop RTL for multiple logic blocks of Hexagon DSP core ... and Automotive. This position involves in-depth understanding of the ASIC design flow from RTL to GDS2 and the...and sub - system for SoC integration + Run various… more
- Microsoft Corporation (Austin, TX)
- …**Responsibilities** + Be part of a design team developing advanced components of the memory sub - system + Own multiple blocks within a complex, coherent ... 4+ years of experience in digital logic design for ASIC or FPGA + 4+ years of logic design...the IPs such as protocol bridges, PCIe, cache controllers, memory controllers and DDR, security engines. + Experience in… more
- Amazon (San Diego, CA)
- …7+ experience in performance architecture across CPUs, interconnect, high speed network I/O, and memory systems in SoCs with emphasis on power efficiency. - Must ... or granted asylum. A day in the life Be part of Project Kuiper's sub -team responsible for defining and implementing the digital chip SOCs for communications via Low… more
- Amazon (Portland, OR)
- …digital ASIC /SoCs. * Full chip timing constraints development, full chip / Sub - System STA and Signoff for a complex, multi-clock, multi-voltage SoC. * ... IR Drop aware STA) into SoC timing signoff flow. * Work for Systems and Architecture, SoC Integration, Verification, DFT, Mixed Signal, IP owners, Synthesis, Place… more
