- Google (Sunnyvale, CA)
- …of static timing analysis. + Experience leading one or more aspects of physical design or physical design flow/methodology, to successful tape-outs ... field, or equivalent practical experience. + 7 years of experience in static timing (ie, full chip timing signoff ownership, constraint authoring and verification,… more
- Google (Sunnyvale, CA)
- …of static timing analysis. + Experience leading one or more aspects of physical design or physical design flow/methodology, to successful tape-outs ... equivalent practical experience. + 3 years of experience in static timing (eg, full chip timing signoff ownership, constraint...and shipping silicon. + Experience in extraction of design parameters, QoR metrics, and analyzing data trends. +… more
- Amazon (Austin, TX)
- …member of our start-up like team through excellent collaboration and teamwork with other physical design engineers as well as with the RTL/Arch. teams About the ... Develop & maintain flows for block and full-chip level static timing analysis * Write, debug & validate timing...(examples: PrimeTime, Tempus, or others) - Understanding of ASIC Physical Design from RTL-to-GDSII - Understanding of… more
- Qualcomm (San Diego, CA)
- …develop tools and methodologies for accuracy, compute, in close collaboration with Snapdragon Physical Design and Timing teams. Qualcomm is using leading edge ... with spice, version-to-version validation. + Provide solutions to the Snapdragon design teams, analyze their requests, and address their requests through ticket… more
- Meta (Sunnyvale, CA)
- …PPA (Power, Performance, and area) of the design . **Required Skills:** Silicon Physical Design Engineer Responsibilities: 1. Develop and own physical ... implementation of multi-hierarchy low-power ML Hardware design including physical -aware logic synthesis, floorplan, place and route, static timing analysis,… more
- Micron Technology, Inc. (Richardson, TX)
- …power per bit solutions in the industry! **Position Overview:** Micron is hiring a Staff Engineer - HBM SOC Physical Design ! You will be responsible for ... improving design and flow issues related to physical design , identifying potential solutions, and working... toolset + 1+ years of experience of Synthesis Design Constraints and Static Timing Analysis. **Preferred… more
- SpaceX (Sunnyvale, CA)
- SOC/ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring ... ultimate goal of enabling human life on Mars. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING)...+ Run, debug, and fix signoff closure issues in static timing analysis (STA), noise, logic equivalency, physical… more
- SpaceX (Bastrop, TX)
- Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out ... goal of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING)...+ Run, debug, and fix signoff closure issues in static timing analysis (STA), noise, logic equivalency, physical… more
- Micron Technology, Inc. (Richardson, TX)
- …power per bit solutions in the industry. **Position Overview:** As a **Principal HBM SOC Design and Integration Engineer ** , you will design and develop ... design optimization for performance and low power consumption, including UPF, static timing analysis, synthesis design constraints, and closing timing with… more
- Google (Sunnyvale, CA)
- …its integration within AI/ML-driven systems. As an Application-Specific Integrated Circuit (ASIC) Physical Design Engineer on the Chip Implementation team, ... Google (https://careers.google.com/benefits/) . + Work on physical design including place and route, EMIR, static ... design including place and route, EMIR, static timing, and physical verification. + Go… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Physical Design Engineer . NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... you'll be doing: + Responsible for all aspects of physical design and implementation of GPU and...assembly and P&R, timing closure. + Craft designs for static timing analysis, power and noise analysis and back-end… more
- Qualcomm (San Diego, CA)
- … physical -aware timing and IR drop ECO solutions ⦁ Collaborate closely with physical design and timing teams to drive methodologies to optimize power and ... methodologies in die-level IR drop, STA, and power. The engineer should be proficient in static timing...experience with Primetime or Tempus ⦁ In-depth knowledge of physical design , preferably but not limited to… more
- Google (Sunnyvale, CA)
- …a related field, or equivalent practical experience. + 7 years of physical design experience with industry-standard tools, languages, and methodologies relevant ... silicon interposer design and advanced packaging technologies. + Experience crafting physical design automation flows. In this role, you'll work to shape… more
- Applied Research Associates, Inc. (Vicksburg, MS)
- …joining our team? Here's what you can expect in your role as a Staff Protection Design Engineer : + Perform simple to complex structural analysis and design , ... freedom methods. + Work with engineers to perform both static and dynamic structural analysis for extreme events +...develop business with new clients and markets. **Staff Protective Design Engineer Requirements** **:** + Bachelor's Degree… more
- Nissha Medical Technologies (Wolcott, CT)
- Design Engineer II- Electrical Engineering/Electronics Summary **Title:** Design Engineer II- Electrical Engineering/Electronics **ID:** 2770 ... CT Description Nissha Medical Technologies is looking for a Design Engineer II with a focus in...of study including Mechanics of Materials, Strength of Materials, Static Analysis, Dynamics, and Mechanism Analysis is required. +… more
- Capgemini (San Francisco, CA)
- …_Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Design Verification (DV) Engineer_ **Location:** _CA-San Francisco_ ... **Job description:** Analog/Mixed-Signal Design Verification **Key responsibilities:** + Extract modeling specifications...Develop timing model for the circuit working with layout engineer . + This role will provide the ability to… more
- The Boeing Company (Tukwila, WA)
- … practices and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs) + ... has an exciting opportunity for an **ASIC and/or FPGA Design and Verification Engineer ** (Experienced, Lead or...algorithm team and third-party IP as needed + Perform static timing analysis, LEC, CDC, linting, and other necessary… more
- Cisco (San Jose, CA)
- …and guide them in refining design and timing constraints for seamless physical design closure. As part of this team, you'll contribute to developing ... of what's possible! Your Impact You are a diligent Design /SDC Engineer with strong analytical skills and... team who oversees fullchip SDCs and works with physical design and DFT teams to close… more
- Amentum (Bingham Farms, MI)
- …as part of a multi-discipline team of professionals. We are looking for a Machine Design engineer who will work to ensure client satisfaction and deliver key ... (CMS) Line of Business. The CMS Technology Group specializes in the design , construction, and operation of unique and complex research and development facilities,… more
- Google (Sunnyvale, CA)
- …Spice simulations, clock verification, and signoff. Preferred qualifications: + Experience in ASIC physical design , physical design flows, and ... delivering unparalleled performance, efficiency, and integration. As a Circuits Design Engineer , Clock Design you...Design you will collaborate with the architecture, logic design DFT, physical design , and… more