- Google (San Diego, CA)
- …related field, or equivalent practical experience. + 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture. + Experience with ... Senior ASIC Engineer, IP Design , Silicon...scripting language like Python or Perl. + Experience with ARM -based SoCs, interconnects and ASIC methodology. **Preferred qualifications:** +… more
- Microsoft Corporation (Mountain View, CA)
- …for passionate engineers to help achieve that mission. We are looking for a Senior Design Engineer to work in the dynamic Microsoft Artificial Intelligence ... working on Intellectual Property (IP) microarchitecture specification, Register Transfer Level ( RTL ) design , synthesis/Lint/CDC/FEV and System on Chip (SOC)… more
- Amazon (Sunnyvale, CA)
- …Edge that is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our ... test plan for sub-systems and the full chip. You will participate in the design verification and bring-up of the chip and subsystems by writing relevant assertions,… more
- Microsoft Corporation (Mountain View, CA)
- …and sustainability related to Microsoft cloud hardware. We are looking for a Senior Design Verification Engineer for customer focused solutions, insight and ... optimize the Cloud infrastructure. We are looking for a Senior Design Verification Engineer to join the...Advanced eXtensible Interface (AXI) protocols. + Background in debugging RTL (Verilog) designs as well as simulation and/or emulation… more
- Google (Portland, OR)
- …+ Define and write CPU subsystem architecture specifications. + Lead the collaboration with RTL , design verification, and physical design teams to develop a ... Senior CPU Architecture and Performance Architect _corporate_fare_ Google...of experience in high-performance microprocessor architecture, microarchitecture, performance and design . + Experience in high-performance CPU architecture and CPU… more
- NVIDIA (Santa Clara, CA)
- …In-silicon measurement, Reset and Boot controllers. + You will be responsible for the RTL design , logic synthesis, and timing analysis of several modules. + ... NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join...like Reset or Chip Boot + Solid frontend ASIC design skills, including RTL design ,… more
- Renesas (Austin, TX)
- …experience developing or using SystemVerilog testbenches. + Working familiarity with hardware RTL or digital subsystem design . + Strong programming skills in ... Senior Firmware Verification Engineer Job Description Renesas Electronics...SystemVerilog-based verification. You will work closely with firmware, silicon design , and applications engineers to ensure reliable PMIC operation… more
- Microsoft Corporation (Santa Barbara, CA)
- …information about the Microsoft Quantum team, please visit https://quantum.microsoft.com/ The Quantum Design team at Microsoft is seeking a ** Senior Quantum ... scalable quantum computing based on topological qubits. As a Senior Quantum Engineer, you will take a key role...(IC) or application specific IC design , physical design , physical verification, register transfer level ( RTL )… more
- Amazon (Sunnyvale, CA)
- …Edge that is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our ... test plan for sub-systems and the full chip. You will participate in the design verification and bring-up of the chip and subsystems by writing relevant assertions,… more
- Oracle (Santa Clara, CA)
- …communities and audiences, consisting of varied roles and responsibilities (eg, architects, senior designers, junior design staff, technicians, etc.). + Hands-on ... firmware. + FPGA implementation experience. Use of FPGAs in a hardware design context, and/or RTL /gateware implementation. \#LI-SM18 Disclaimer: **Certain US… more
- Microsoft Corporation (Santa Clara, CA)
- …to identify and resolve design issues. + Understanding of digital design , computer architecture ( ARM , RISC-V, MIPS), and verification methodologies. + ... the capability to efficiently handle large data streams. Thanks to its integrated design , this solution empowers teams to operate with increased agility and deliver… more