- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If ... inventiveness and intelligence. What you'll be doing: + Drive timing analysis and closure of Nvidia's GPUs, CPUs, DPUs...DFX, Clocks, and other teams in coming up with timing closure strategy, creating timing constraints, driving… more
- NVIDIA (Westford, MA)
- …life's work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding ... be doing: + You will drive physical design and timing of high-frequency and low-power DPUs and SoCs at...from RTL to gds2, including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and… more
- SpaceX (Irvine, CA)
- Sr. SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future ... enabling human life on Mars. SR. SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER (SILICON...COMPENSATION & BENEFITS: Pay range: Synthesis and Front-End STA Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual… more
- BAE Systems (San Jose, CA)
- …on position level and/or job specifics. ** Senior Principal Front End ASIC Design Engineer (Hybrid)** **105684BR** EEO Career Site Equal Opportunity Employer. ... of a large company. We are looking for a senior level chip designer who has strong proficiency in...chip designer who has strong proficiency in both + ASIC design- performing architecture design, RTL coding/simulation, timing… more
- Belcan (Linthicum Heights, MD)
- Senior ASIC DFT Engineer Job...problem solving * Knowledge of Synthesis, P&R and Static Timing Analysis would be a plus * US citizenship is ... Number: 351713 Category: Electrical / Electronics Description: Job Title: Senior ASIC DFT Engineer Pay Rate: $66.5/hr. Location: Linthicum, MD ZIP Code:… more
- Microsoft Corporation (Redmond, WA)
- …is looking for a ** Senior Quantum Digital Application-Specific Integrated Circuit ( ASIC ) Design Engineer ** to work as digital Application Specific Integrated ... We are looking for ** Senior Quantum Digital Application-Specific Integrated Circuit ( ASIC ) Design Engineer ** who is as passionate about their own… more
- RTX Corporation (Cedar Rapids, IA)
- …their needs for tomorrow. Are you up for the challenge? Join our mission today. Senior Electrical Engineer - ASIC /FPGA - Advanced Technology (Onsite) This ... position is for a motivated Senior Electrical or Computer engineering candidate to be involved...Technologies team. What You Will Do: + Requirements capture, ASIC / FPGA digital architecture and design using RTL,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This ... Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/ timing clean design. + Collaborate and coordinate with architects, other… more
- Northrop Grumman (Baltimore, MD)
- …to join our team as a Principal Digital Engineer / Senior Principal Digital Engineer (FPGA and ASIC Design) based out of Linthicum, MD. **What You'll get ... team in Mission Systems that encompasses Digital Engineering to support FPGA and ASIC product development. + Work closely with design engineers and will utilize your… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the ... fully verified design by working closely with verification engineers. + Deliver a synthesis/ timing clean design while working with the physical design team to ensure… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At...as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll join a group of hardworking engineers ... BS or equivalent experience in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD)...+ You have experience with all stages in the ASIC design flow including emulation, prototyping, DFT, timing… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... team member, you will be collaborating with other architects, ASIC designers and verification engineers to design high frequency...clock information to GPU, CPU and SOC verification team, timing and DFT teams. You will use Perl to… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The Clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... team member, you will be collaborating with other architects, ASIC designers and verification engineers to design high frequency...members, we deliver clock information to SOC verification team, timing and DFT teams. You will use Perl to… more
- Amazon (Cupertino, CA)
- …scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ... signal routing - As a key member of the ASIC design team, you will implement and deliver high...requirements. - Develop micro-architecture, implement SystemVerilog RTL, and deliver synthesis/ timing clean design with constraints. - Perform lint and… more
- NVIDIA (Westford, MA)
- …Tasks will include micro-architectural definition, RTL coding, logic debug, timing closure, power optimization and verification support. The ideal candidate ... + partnering with our Physical Design team on partitioning, floorplanning and timing closure + providing design documentation, triaging and debugging functional and… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies ... in Electrical or Computer Engineering with 5 years' experience in ASIC Design and Timing . + Good knowledge of extraction, device physics, STA methodology and… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies ... in Electrical or Computer Engineering with 5+ years experience in ASIC Design and Timing . + Proven understanding of circuit design and spice simulations.… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Logic Design Engineer ! Asa member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and ... tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure, supporting verification and implementation. This position offers you… more
- Micron Technology, Inc. (Atlanta, GA)
- …how the world uses information to enrich life. Micron is searching for its next Principal/ Senior Design Verification Engineer ! In this role, you will work with a ... would be a stong plus + Understanding of industry ASIC design & flow which includes RTL design, logic...design & flow which includes RTL design, logic and timing synthesis, and verification. + Familiarity with the DRAM… more