- Google (Sunnyvale, CA)
- …supply agreements. + Understanding of the end-to-end semiconductor fabrication process, from silicon ingot to advanced packaging, test , and assembly. + ... Senior Strategic Financial Analyst, Chip Development _corporate_fare_ Google _place_ Sunnyvale, CA, USA...competitor gross margins, and identifying core cost drivers for silicon companies. + In-depth knowledge of global semiconductor supply… more
- Broadcom (Irvine, CA)
- …Description:** Broadcom is seeking a highly experienced and accomplished Principal ASIC Chip Lead to lead the development of cutting-edge System-on- Chip (SoC) ... flow + Work with verification team to collaborate on test plan, coverage plan, and coverage closure + Work...systems team and help with bring-up on FPGA and Silicon platforms + Work with operations team to bring… more
- Google (Mountain View, CA)
- …silicon , package and board levels. Work with cross-functional teams to translate System-on- Chip mission profiles into reliability test plans and models using ... Head of Silicon Package Reliability _corporate_fare_ Google _place_ Mountain View,...PhD in Hardware Engineering. + Experience in leading reliability program reviews with executives, right sizing and prioritizing technical… more
- Cisco (San Jose, CA)
- …Assembly & Test (OSAT) and key component partners, driving assembly, test , and qualification for silicon photonics packages. + Proactively identify and ... **Packaging Technical Leader - Silicon Photonics** **The application window is expected to...Experience with Advanced Packaging technologies such as 2.5D/3D, TSV, flip- chip , stacking, hybrid integration. **Why Cisco?** At Cisco, we're… more
- SpaceX (Bastrop, TX)
- Die Bonding Specialist, Silicon Assembly (Starlink) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... the ultimate goal of enabling human life on Mars. DIE BONDING SPECIALIST, SILICON ASSEMBLY (STARLINK) One of the most ambitious missions that SpaceX has undertaken… more
- Meta (Sunnyvale, CA)
- … Silicon bring-up, translating system level use-cases into specific test scenarios at SoC level **Public Compensation:** $178,000/year to $250,000/year + ... in Design Verification to build IP and System On Chip (SoC) for data center applications. As a Design...verification closure of a design module or sub-system from test -planning, UVM based test bench development to… more
- Cisco (San Jose, CA)
- **Meet the team:** The Common Hardware Group (CHG) delivers the silicon , optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. ... sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in… more
- NVIDIA (Santa Clara, CA)
- We seek a Senior Technical Program Manager to lead Design-for- Test (DFX) engineering programs for our next-generation chip designs. This role sits at the ... intersection of silicon design, bring-up, and manufacturing test , driving...product quality and scalability innovation. You'll own the full program lifecycle from pre- silicon through release, ensuring… more
- Google (Austin, TX)
- …technical field or equivalent practical experience. + 5 years of experience in program management. + Experience in ASIC/ chip design with leadership and technical ... Technical Program Manager III, Foundry Commodity Management, Cloud Supply...as scan chains, JTAG, and MBIST to enable efficient test and debug of the silicon . +… more
- Cisco (San Jose, CA)
- … silicon validation flows. + Work with the team on Innovative Hardware DFT & test strategy aspects for new silicon device models, bare die & stacked die, ... **Who we are:** The Common Hardware Group (CHG) delivers the silicon , optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We… more
- Broadcom (Irvine, CA)
- …resource requirements & development schedule + generate test plans for post silicon validation + This opening work on chip design which enables ... debug etc. + prepare block level resource requirements & development schedule + generate test plans for post silicon validation Requirement: + _B.S degree in EE… more
- Broadcom (Irvine, CA)
- …to drive next-generation package architecture, design, and productization using advanced node silicon (7nm, 5nm, 3nm and beyond). This role partners closely with ... chip design, system design, SI/PI, thermal, and manufacturing teams...for advanced packaging technologies. + Define POR for new silicon nodes including bump metallization, geometry, and process requirements.… more
- Broadcom (Irvine, CA)
- …technology platform definition, PPAC (power performance area cost) assessment and benchmarking, test structure design, silicon characterization and model to ... design enablement. Responsibilities as part of technology evaluation will involve test structure layout, verification, extraction, simulation, and silicon … more
- Meta (Sunnyvale, CA)
- …ASIC Engineer, Design Verification Responsibilities: 1. Define and implement block/IP/System on Chip (SoC) verification plans, build verification test benches to ... in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification...verification closure of a design module or sub-system from test -planning, UVM based test bench development to… more
- NVIDIA (Santa Clara, CA)
- …and execute test plans to support both functional and DFT full- chip verification. + Support post- silicon bring-up and validation efforts including debug ... in post- silicon bring-up on ATE, including understanding of pattern formats, test program development, and failure analysis. + Proficiency in scripting… more
- Broadcom (San Jose, CA)
- …chip architecture and micro-architecture to define, develop, and execute comprehensive pre- silicon test plans that thoroughly validate switch features. + ... architecture, and micro-architecture using emulation platforms. + Develop sub-system and chip -level tests using Tcl, ITcl, Python, and C/C++ to verify networking… more
- Cisco (Carlsbad, CA)
- …part of a world class photonics team on the integration of Cisco's silicon photonics into our automated, high-volume packaging line. Our high-volume packaging line ... uses in-house designed/developed assembly and test tools and processes that provide a unique opportunity...to seek modes of improvement that span from photonic chip design to optical assembly (ie, integration of fibers,… more
- Cisco (San Jose, CA)
- …+ Experience with microarchitecture and RTL implementation. + Experience with block/full chip SDC development in functional and test modes. + Understanding ... at any time. **Meet the Team** Join the Cisco Silicon One team in developing a unified silicon...will collaborate with Front-end and Back-end teams to understand chip architecture and guide them in refining design and… more
- Broadcom (San Jose, CA)
- …test quality of the products from Design to Production + Participate/contribute in silicon bring-up, characterization, and silicon test + Define and ... complex and cutting edge network switching ASIC DFx (Design for Test /debug & manufacturability) from DFT architecture, to implementation, verification, timing… more
- Broadcom (Fort Collins, CO)
- …Verifying & Debugging Test vectors before tape release. + Validating & Debugging Test vectors on ATE during the silicon bring up phase + Assisting with ... will be responsible for leading DFT programs all the way from chip level DFT specification, through to implementation and verification culminating in successfully… more