- SpaceX (Bastrop, TX)
- Sr. SOC / ASIC Physical Design Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC / ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC / ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC / ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
- SpaceX (Redmond, WA)
- FPGA/ ASIC Design Engineer (Silicon Engineering) Redmond, WA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... the ultimate goal of enabling human life on Mars. FPGA/ ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX...Starlink projects, implementing complex SoC blocks and SoC integration tasks + Implement or integrate design… more
- SpaceX (Irvine, CA)
- Sr. ASIC Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX...problems including clock domain crossings and power optimization + ASIC / SoC system integration experience + Experience with… more
- Amazon (San Diego, CA)
- …ASIC / SOC leads) to create project execution plans for ASIC / SOC development considering all criteria to design products the meet the power/performance ... for a Sr. Technical Program Manager with experience in ASIC / SOC development, from architecture to pre-production stages,...from architecture definition, RTL design , Verification, IP design , Physical design , silicon bring… more
- Cisco (San Jose, CA)
- Technical Leader ASIC Design - Prototyping Apply (https://jobs.cisco.com/jobs/Login?projectId=1439389) + Location:San Jose, California, US + Area of ... systems, leveraging the latest technology. We're seeking a talented ASIC engineer with a focus on FPGA Prototyping and...primary focus on FPGA Prototyping + Map multi-million gate SoC designs onto prototyping platforms, creating design … more
- NVIDIA (Santa Clara, CA)
- …interconnect and floorplan improvement opportunities + Solve timing and routing congestion issues with physical and ASIC design teams by influencing early ... seeking a talented ASIC Floorplan Engineer to design and implement the world's leading SoC 's...What you will be doing: + Working with architects, design leads, physical design leads… more
- NVIDIA (Santa Clara, CA)
- …Design Engineers to design and implement the world's leading GPU and SoC 's. With the System- ASIC team, you will contribute to designing multiple products ... doing: + Be an integral part of the System ASIC Design team to help with the...of several modules. + Integrate modules into the overall SOC design and work closely with other… more
- Cisco (San Jose, CA)
- ASIC Design Verification Engineer, Technical Leader Apply (https://jobs.cisco.com/jobs/Login?projectId=1447177) + Location:San Jose, California, US + Area of ... be in the Silicon One development organization as an ASIC design verification engineer in San Jose,...in verifying complex blocks, clusters and top level for SoC + Prior experience building test benches from scratch,… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC 's and GPU's. This position offers the ... synthesis/timing clean design while working with the physical design team to ensure a routable...Systems design . + A deep understanding of ASIC design flow including RTL design… more
- Cisco (San Jose, CA)
- …complex block, cluster or chip-level design + Lead verification for a complete SOC or ASIC i + Prior Experience with Forwarding logic/Parsers/P4 + Formal ... hands-on experience in RTL verification and in-depth knowledge of SoC development cycle and the best industry practices, from...ASIC bring up **Minimum Qualifications:** + 10+ years ASIC design verification experience with a bachelor's… more
- NVIDIA (Santa Clara, CA)
- …closure to innovate and implement new Clocking topologies in RTL. + Collaborate with Physical design and timing team to evaluate Clocking concerns and develop ... will be architecting the clock domain to satisfy functional, physical and testing design requirements. + Engage...DFT teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation,… more
- Meta (Sunnyvale, CA)
- …Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback **Minimum ... teams and vendors **Preferred Qualifications:** Preferred Qualifications: 14. Experience with SOC Design Integration & Front End Implementation 15. Experience… more
- Meta (Sunnyvale, CA)
- …Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback **Minimum ... teams and vendors **Preferred Qualifications:** Preferred Qualifications: 17. Experience in SOC Design Integration and Front-End Implementation 18. Knowledge of… more
- Meta (Sunnyvale, CA)
- …Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback **Minimum ... Integration (Clocking, Reset, PLL, etc) 13. Knowledge of front-end ASIC flows 14. Experience with RTL design ...experience using Perl/Python, TCL, and Make 17. Experience with SOC Design Integration and Front-End Implementation 18.… more
- SanDisk (Irvine, CA)
- …and reviewing **low-level firmware** in C/C++ and/or Python + Solid understanding of ** SoC design ** and processor architectures (eg, ARM, ARC) + Familiarity with ... for a **PCIe expert** with a strong background in ** ASIC and Firmware development** to help define, architect, and...products. In this high-impact role, you will drive the design of advanced SSD subsystems, write detailed specifications, and… more
- NVIDIA (Santa Clara, CA)
- NVIDIA Networking Clock design team is looking for experienced top notch ASIC design engineer to work on next generation of NVIDIA Networking chips. We're ... role requires working with multiple teams as Architecture, IP, Physical design , Timing and Post-Si teams. Complexity...Working on next generation of Networking Switch, NIC and SoC products. + Micro architect and design … more
- Amazon (Austin, TX)
- …Develop and execute design automation mechanisms and flows. * Work with physical design teams to achieve performance and area requirements. Mentorship & ... requirements including software applications, use models, system architecture and SoC architecture/micro-architecture solutions. * Participate in logic design … more
- NVIDIA (Santa Clara, CA)
- …5+ years' experience or MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA tools, ECO implementation, ... next generation of high-performance IPs for CPU, GPU and SOC designs. + Owning static timing analysis and convergence...with cross-functional teams. + Strong understanding of timing and physical design fundamentals Ways to stand out… more
- Meta (Sunnyvale, CA)
- …at the entire stack, from transistor, through architecture, to firmware, and algorithms.As an SoC Physical Design Engineer at Meta Reality Labs, you will ... area requirements needed for our wearable products. **Required Skills:** SoC Physical Design Engineer Responsibilities:...joining Meta 6. 3+ years of hands-on experience in ASIC physical design with solid… more