- Amazon (Portland, OR)
- …Edge that is powering the latest generation of Echo devices is looking for a Senior SoC Design - EM/IR Engineer to continue to innovate on behalf of our ... and IR analysis for Power Delivery Network and Standard Cell design . * Conduct detailed analysis of the PDN at Chip Top and block level to find and address… more
- TEKsystems (Orange, CA)
- …a Tier 1 Cyber Security Analyst to join our County of Orange Security Operations Center ( SOC ) team. The core mission of the SOC is to protect County assets, ... Security Information and Event Management (SIEM) alerts and assist with other SOC functions such as incident response, digital forensics, data loss prevention, and… more
- Cisco (San Jose, CA)
- …and supporting our prototyping methodology + Option to engage in block- level RTL design or block or top - level IP integration + Collaborate with Software, ... Technical Leader with primary focus on FPGA Prototyping + Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds,… more
- Meta (San Diego, CA)
- …7+ years of experience as a Digital Design Engineer 9. Experience with top level integration using automation tools. 10. Experience in RTL coding, synthesis ... Digital Design Engineer Responsibilities: 1. Responsible for top - level or block level uArchitecture...and/or SoC Integration. 11. Experience in digital design … more
- NVIDIA (Santa Clara, CA)
- …C/C++ is essential. + Be familiar with hierarchical design approach, top -down design , SoC and system level verification. + Candidates will be working ... Accelerated UVM Testbenches). + Bring up SOCs on emulation, root causing SoC /Processor test fails and emulator environment issues. + We have continual collaboration… more
- Meta (Sunnyvale, CA)
- …and C/C++ based verification 10. 8+ years of experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies 11. ... 6. Support hand-off and integration of developed subsystems/IP blocks into larger SOC environments 7. Develop and drive continuous Design Verification… more
- Amazon (Sunnyvale, CA)
- …buses like AMBA AXI4 - Experience in integrating third party IP blocks, building top level modules, defining clock domains and power domains - Large breadth ... in consumer devices. They should be familiar with modern SoC architectures, various interconnect topologies such as AMBA AXI,...with ARM and various DSP ISA - Experience debugging system- level issues - Experience in entire design … more
- Meta (Sunnyvale, CA)
- …verification and UVM methodology 10. 2+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies 11. ... to validate new core IP or System on Chip ( SoC ) implementations. You will work closely with researchers, architects...track detailed test plans for the different modules and top levels 3. Drive Design Verification to… more
- Amazon (Cupertino, CA)
- …the right trade-offs. Key job responsibilities - integrate multiple subsystems into top level SOC , ensure correct clock/reset/functional/DFT signal routing ... - BS in Electrical Engineering or related technical field - 5+ years in RTL design for SOC - 5+ years in VLSI engineering - 5+ years with code quality tools… more
- Arrow Electronics (San Jose, CA)
- …and supporting our prototyping methodology. + **Option to engage in block- level RTL design or block or top - level IP integration.** + Collaborate with ... **What candidate will Be Doing:** + Map multi-million gate SoC designs onto prototyping platforms, creating design ...based upon geographic location, work experience, education, and/or skill level . The pay ratio between base pay and target… more
- Cisco (San Jose, CA)
- …provide solutions and ensure signoff clean results. + Work closely with block and TOP level physical implementation, IP development teams and to resolve PV ... robustness. + Guide and mentor a team of physical design engineers on project- level backend implementation and...with semiconductor foundries on installation and maintenance of process design kits (PDKs) for SOC physical … more
- NVIDIA (Santa Clara, CA)
- …HSpice, Finesim, XA) + Experience in crafting test bench environments for component and top level circuit verification + Expertise in System Verilog or similar ... We are looking for an Engineer to verify the design and implementation of the world's leading SoC...salary range is 136,000 USD - 212,750 USD for Level 3, and 168,000 USD - 264,500 USD for… more
- Silvus Technologies (Los Angeles, CA)
- …and PCB design of electrical systems based on an FPGA SoC with associated memory devices, transceivers, communication peripherals and power management circuitry ... career. THE OPPORTUNITY Silvus is seeking a full-time **_Senior Electronics Design Engineer_** reporting to the _Engineering Manager, Product Design_ on the… more
- Meta (San Diego, CA)
- …verification and UVM methodology. 9. 3+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies. 10. ... and track detailed test plans for the different modules and top levels. 3. Drive Design Verification to closure based on defined verification metrics on test… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top -notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... and CPU clocking. The team collaborates with the front design team to understand the clocking requirements for the...we deliver clock RTL information to GPU, CPU and SOC verification team, timing and DFT teams. + Get… more
- Meta (Sunnyvale, CA)
- …Define and track detailed test plans for the different modules and top level systems. Validation coverage includes SoC , low speed signal interface (I2C, I2S, ... **Summary:** Electrical Design Validation Engineer in Wearables Hardware will be...Python, and LabVIEW development experience 18. Board and system level validation and debugging experience 19. Experience with mobile… more
- Cisco (San Jose, CA)
- …System Verilog and UVM methodology + Prior experience in verifying complex blocks, clusters and top level for SoC + Prior experience building test benches ... ASIC Design Verification Engineer, Technical Leader Apply (https://jobs.cisco.com/jobs/Login?projectId=1447177) +...that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through… more
- Medtronic (Lafayette, CO)
- …and SOC verification and validation requirements Create verification IP block to top and cross-platform reuse Familiarity with RTL design practices a plus ... colleagues or may direct the work of other lower level professionals. The majority of time is spent delivering...initiatives related to new technologies or therapies - from design to implementation - while adhering to policies, using… more
- NVIDIA (Santa Clara, CA)
- …C/C++ is essential. + Be familiar with hierarchical design approach, top -down design , SoC and system level verification. + Candidates will be working ... Testbenches). + Bring up GPUs, SOCs, Switch, NIC on emulation, root causing system level test fails and emulator environment issues. + Bring-up and verify High Speed… more
- The Boeing Company (El Segundo, CA)
- …excellence and achieve program objectives. **Position Responsibilities:** **(Experienced (P3)** + Design , develop, integrate, test and debug low level software ... and coherent cache architectures. + Write and maintain detailed documentation: SoC boot flow, software initialization sequences, register- level programming… more