- NVIDIA (Santa Clara, CA)
- …for the next generation. We are looking to hire a skilled and creative SRAM circuit designer to help achieve these goals in a high-visibility position. What you'll ... exploring device and wire models, as well as higher-level SRAM bitcell issues like Vmin, Vmax, and Iread +...layout implementation, physical and logical verification, and debug of SRAM macros and test structures for early test vehicles… more
- Texas Instruments (Dallas, TX)
- **Job Description:** Being responsible for SRAM memory device development, you will join a small development team with talented and driven contributors to deliver ... requirements and to evaluate tradeoffs providing a unique opportunity to create SRAM memory solutions for TI customers. Highly visible position interacting with… more
- Astronics (Clackamas, OR)
- …experience. **Primary Duties and Responsibilities:** **FPGA Development:** + Implement and test new SRAM and DMA modules for image data flow. + Update and optimize ... management + Experience with sensor integration and calibration a plus. + Experience with SRAM and DDRAM is a plus. + Strong documentation and debugging skills. +… more
- Qualcomm (Santa Clara, CA)
- …optimize the overall package design, including: + Utilizing experience and expertise in SRAM , DRAM, DDR, LPDDR, HBM, GDDR and newly emerging memory technologies to ... use of IBIS and IBIS AMI models. + Outstanding memory architecture expertise on SRAM , DRAM, DDR, LPDDR, HBM, GDDR and emerging memory technologies such as STT-MRAM,… more
- NVIDIA (Santa Clara, CA)
- …to work on the physical layout design and development of our next generation custom SRAM macro-IPs. As part of the Digital Full-Custom Macro Team, you will work with ... our NVIDIA products. What you will be doing: + Perform physical layout of SRAM and datapath circuits using Cadence tools. + Your duties will include floor-planning,… more
- Qualcomm (San Diego, CA)
- …not limited to): + Develop custom digital circuits for high-speed and low-power SRAM designs + Schematic capture, simulation of major blocks, margin verifications + ... applications + Strong knowledge in CPU L1/L2 cache design, compiler SRAM /Register File architectures and advanced custom circuit implementations + Strong knowledge… more
- Meta (Sunnyvale, CA)
- …flow such as Floorplanning, CTS, Routing 19. Understanding of Timing/physical libraries, SRAM Memories 20. Knowledge of STA signoff and understanding of AOCV, POCV ... 21. Experience with low power techniques for reducing power 22. Experience with EDA tools and scripting languages (Python, TCL) used to build tools and flows 23. Experience with Design Compiler, Spyglass, PrimeTime, Formality or equivalent tools **Public… more
- Meta (Sunnyvale, CA)
- …Design Integration and Front-End Implementation 18. Knowledge of Timing/physical libraries, SRAM Memories 19. Experience with Netlist CDC Analysis and improving Mean ... Time Between Failures 20. Experience with Design Compiler, Spyglass, PrimeTime, Formality or equivalent tools 21. Experience with developing structural rule based checks for RTL & Netlist **Public Compensation:** $142,000/year to $203,000/year + bonus + equity… more
- Meta (Sunnyvale, CA)
- …used to build tools and flows 19. Knowledge of Timing/physical libraries, SRAM Memories **Public Compensation:** $142,000/year to $203,000/year + bonus + equity + ... benefits **Industry:** Internet **Equal Opportunity:** Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or… more
- Amazon (Sunnyvale, CA)
- …PCIe, QSPI, I2C,UART, EMMC, USB. LPDDR controller & Phy IP integration, embedded memory ( SRAM , OTP etc;.) Other IP integration such as ADC, PLL, DLL, PVT sensors, ... GPIO & Debug (Coresight) - In-depth knowledge of in one or more areas such as CPU, DSP, or programmable accelerators - SoC bring-up and post silicon validation experience - Experience with early RTL power analysis - Experience with gate level testing and multi… more
- Capgemini (Minneapolis, MN)
- …Layout Engineer, where you'll collaborate closely with SoC partners to craft innovative SRAM and Register File layout designs. You'll play a key role in design ... reviews, contributing to the continuous improvement of memory layout quality and performance. **Your Role** + Design and implement custom memory layouts for advanced technology nodes, working hand-in-hand with circuit designers to optimize for performance,… more
- Renesas (San Jose, CA)
- …USB, I2C/I3C, SPI, UART; packet-oriented protocols. + Good knowledge of embedded memories - SRAM , OTP, MTP and EE/Flash memory + Good knowledge of design flow. + ... Hands on in chip architecture definition, Partition, assignment, RTL coding, simulation, synthesis, DFT and timing check. + Bilingual and Mandarin fluency would be a plus + DDR DRAM and Flash memory knowledge would be a plus + Mixed signal knowledge and chip… more
- Micron Technology, Inc. (San Jose, CA)
- …SPICE; 3. Hardware design and development; 4. Memory Technologies, including DRAM, SRAM , Flash, emerging non-volatile memories like PCM, ReRAM, MRAM, and their ... operation, advantages, limitations, and application use cases; 5. Digital Circuit Design, including digital design principles and practices, logic design, design tools and languages, including Verilog or VHDL; 6. Computer Architecture, including memory-CPU… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …+ Detailed knowledge about industry standard interfaces such as PCI Express, DRAM/DDR4, SRAM , I2C, JTAG, AXI The annual salary range for California is $131,600 to ... $244,400. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and… more
- BrainChip, Inc. (Laguna Hills, CA)
- …modern computational architectures Fluent in Verilog and SystemVerilog Knowledge of CPU and SRAM based SoC components and system busses (AXI, AHB, APB) is strongly ... desired Knowledge of standard SoC interfaces (SPI, I2C, etc ) and high-speed IO protocols (PCIe, USB, DDR) is a plus Good skills in Python and shell scripting are desired Good debugging skills, and well experienced with VCS/Verdi or similar toolsets Language… more
- Broadcom (Irvine, CA)
- …issues **Skillset Required** + Working Knowledge of Common memory types such as SRAM , RF, ROM and familiarity with CMOS digital circuits + Good understanding of ... transistor level circuit behavior and device physics + Knowledge of signal integrity, EM/IR, and reliability issues + Understanding of memory behavioral and physical models is a plus + Understanding of DFT schemes and chip level integration is a plus +… more
- Amazon (Austin, TX)
- …on high performance chips. - Knowledge of usage of ATPG scan diagnostics and SRAM bitmap analysis for FA and yield debug. - Proficiency in statistical analysis tools ... (JMP, Python) and automation for semiconductor test data. - Experience building automated analysis systems and interactive dashboards for yield and quality monitoring. - Familiarity with AWS services (Sagemaker, S3, Quicksight etc.) and ability to use these… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …+ Detailed knowledge about industry standard interfaces such as PCI Express, DRAM/DDR4, SRAM , I2C, JTAG, AXI The annual salary range for California is $131,600 to ... $244,400. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and… more