- Marvell Technology, Inc. (Santa Clara, CA)
- …and innovative environment. We are seeking a Senior Staff Physical Design Engineer - Static Timing Analysis (STA) to join our growing team. In this role, ... and high-quality tape-outs. What You Can Expect Perform full-chip and block-level static timing analysis for advanced ASIC designs Develop, maintain, and… more
- DBSI Services, Inc. (Milpitas, CA)
- … Timing Optimization, Clock TreeSynthesis, Routing) Perform sign-off tasks (RC Extraction, Static Timing Analysis , IR drop analysis andPhysical ... Benefits: 401(k) 401(k) matching Relocation bonus Job Title: Physical Design Engineer Location: Milpitas, CA Primary Responsibilities: Pre-layout STA to ascertain… more
- SiMa Technologies (San Jose, CA)
- …Ethernet and USB. Your responsibilities will include RTL coding, design and reviews, synthesis, static timing analysis , and coverage analysis . This means ... Description Job Title: Sr Principal Engineer , Hardware Design Job Location: San Jose, CA...component. Areas of Focus : Design methodology, micro-architecture, RTL. Static timing analysis , verification/emulation support,… more
- Cisco Systems Inc (Maynard, MA)
- …and/or Mentor Experience with floor planning & partitioning, synthesis, place & route, static timing analysis (STA), formal equivalence check, Clock Tree ... of input and design collateral. You will work closely with Back-end team on timing signoff for seamless physical design closure. You will work with the ASIC physical… more
- Rivos (Santa Clara, CA)
- …transistor level circuit design, circuit simulation, equivalence checking, PPA trade off analysis , low power design techniques, timing , noise and power ... Register file memories, and compiled memories to improve circuit performance, optimize dynamic and static power and support silicon bring up. The role will be at the… more
- Talascend (Auburn Hills, MI)
- Talascend is currently seeking a hybrid HVAC Release Engineer with a leading automotive manufacturer located in Auburn Hills, Michigan. OVERVIEW: The HVAC Release ... Engineer is responsible for the development and validation of...change notices and overall supplier management to meet program timing and deliverables. Candidate will maintain a component and… more
- Google (Sunnyvale, CA)
- …Science, a related field, or equivalent practical experience. + 5 years of experience in static timing analysis . + Experience in full chip timing ... for ASICs. + Experience in PrimeTime or Tempus TCL scripting and static timing analysis debug. Preferred qualifications: + Experience writing, reviewing and… more
- Northrop Grumman (Morrisville, NC)
- …work of your career. Northrop Grumman Mission Systems, Digital Technologies Group, is seeking a Static Timing Engineer to join our team of highly qualified, ... maintain an active DoD Secret clearance.** **Roles and Responsibilities:** + Responsible for static timing analysis on digital designs to ensure timing … more
- Meta (Sunnyvale, CA)
- …Engineers within our Infrastructure organization. **Required Skills:** ASIC Implementation Engineer - Static Verification Responsibilities: 1. Perform Flat ... work with the Designers to create waivers 4. Perform RTL Design for Testability Analysis and improve the Design for Testability coverage for Stuck-at faults 5. Run… more
- Meta (Austin, TX)
- … timing analysis , SI noise analysis 11. Experience with running Static Timing Analysis for full chip using DMSA 12. Knowledge of front-end and ... experience in front-end implementation from RTL to netlist, including RTL Lint, CDC analysis , timing constraints, synthesis to build efficient System on Chip… more
- NVIDIA (Santa Clara, CA)
- …years experience in Synthesis and Timing + Hands-on experience in full-chip/sub-chip Static Timing Analysis (STA), timing constraints generation and ... intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and...inventiveness and intelligence. What you'll be doing: + Drive timing analysis and closure of Nvidia's GPUs,… more
- NVIDIA (Santa Clara, CA)
- …with 2 years experience in Timing and STA + Hands-on experience in full-chip/sub-chip Static Timing Analysis (STA) and timing convergence, timing ... intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and...inventiveness and intelligence. What you'll be doing: + Drive timing analysis and closure of Nvidia's GPUs,… more
- NVIDIA (Santa Clara, CA)
- …+ 8+ years experience in Physical design/ Timing . + Experience in full-chip/sub-chip Static Timing Analysis (STA), timing constraints generation and ... CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and...+ You will be responsible for all aspects of timing including, timing analysis and… more
- NVIDIA (Westford, MA)
- … tools like Synopsys PrimeTime or Cadence Tempus. + Solid experience in full-chip/sub-chip Static Timing Analysis (STA), timing constraints generation ... and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding Networking Silicon...be doing: + You will drive physical design and timing of high-frequency and low-power DPUs and SoCs at… more
- Cisco (San Jose, CA)
- ASIC Design Engineer - Design & Timing Constraints...development in functional and test modes + Experience in Static Timing Analysis and prior ... of our systems, leveraging the latest technology. We're seeking a talented ASIC engineer with a proven track record in high-performance products, ready to make a… more
- Microsoft Corporation (Hillsboro, OR)
- …+ OR equivalent experience. + 8+ years of experience in Physical Design, specifically Static Timing Analysis and Convergence domains. + 8+ years of ... the Cloud infrastructure. We are looking for a **Principal Timing /STA Engineer ** to join the team. **Responsibilities**...drive timing constraints and methodology. + Conduct timing analysis and sign-off for critical paths,… more
- NVIDIA (Santa Clara, CA)
- …Engineering or related field (or equivalent experience). + 6+ years of experience in static timing analysis , methodology, or constraint development. + Strong ... work, to amplify human inventiveness and intelligence. We are seeking a highly skilled Timing Methodology Engineer with expertise in asynchronous timing and… more
- NVIDIA (Santa Clara, CA)
- …next generation of high-performance IPs for CPU, GPU and SOC designs. + Owning static timing analysis and convergence of high-performance designs. + You ... be responsible for all aspects of timing including setting up timing constraints, timing analysis and closure, ECO implementation, and timing … more
- Cisco (San Jose, CA)
- …with block/full chip SDC development in functional and test modes. + Experience in Static Timing Analysis and prior working experience with STA tools ... ASIC Design Technical Leader - Design & Timing Constraints Focus Apply (https://jobs.cisco.com/jobs/Login?projectId=1432242) + Location:San Jose, California, US +… more
- NVIDIA (Austin, TX)
- …Engineering or Device Physics (or equivalent experience) + 8+ years experience in gate-level static timing analysis and/or power analysis + Proficiency ... algorithms in C++. We are seeking a CAD R&D Engineer excited to innovate in algorithms for large scale...algorithms for large scale and high accuracy gate-level power, timing , parasitic, and noise analysis . A deep… more
