- Synopsys (Sunnyvale, CA)
- …You Are: You are a highly skilled engineer with a passion for digital design and verification . You thrive in dynamic environments and are always eager ... tools. Verify the design in simulation using Verilog, SystemVerilog, and UVM (Universal Verification Methodology). Create user documentation. Create test… more
- Draper (Boston, MA)
- …Summary: Draper's Digital Design Team is seeking a motivated and experienced Senior UVM Digital Verification Engineer to tackle novel verification ... and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed-signal... digital and embedded hardware platforms. + Develop verification and test plans + Develop UVM … more
- Draper (Boston, MA)
- …Description Summary: Draper's Digital Design Team is seeking a motivated and experienced UVM Digital Verification Engineer to tackle novel ... and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed-signal... digital and embedded hardware platforms. + Develop verification and test plans + Develop UVM … more
- Draper (Boston, MA)
- …Summary: Draper's Digital Design Team is seeking a motivated and experienced Principal UVM Digital Verification Engineer to tackle novel ... and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed-signal...+ Strong analysis and problem-solving skills + Develop verification and test plans + Develop UVM … more
- Northrop Grumman (Linthicum Heights, MD)
- …of your career. We are looking for you to join our team as a Principal Digital Verification Engineer /Senior Principal Digital Verification ... NC. This requisition may be filled as a Principal Digital Engineer or a Senior Principal ...complex ASIC at block level and SOC level using UVM (Universal Verification Methodology) and SystemVerilogl. +… more
- Northrop Grumman (Mcclellan, CA)
- …Sr. Principal level. Qualifications for both are listed below:** **Basic Qualifications Principal Digital Verification Engineer :** + Bachelor's degree in a ... Top Secret/SCI security clearance with Polygraph** **.** **Basic Qualifications Senior Principal Digital Verification Engineer :** + Bachelor's degree in a… more
- NVIDIA (Santa Clara, CA)
- We're now looking for a Senior Digital Design Verification Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... to join our diverse team today! As a Senior Digital Design Verification Engineer at...models and micro-architecture of the SerDes IPs using advanced verification methodologies such as UVM . + Build… more
- Northrop Grumman (Mcclellan, CA)
- …**_This work will be done 100% onsite in McClellan, CA._** **Basic Qualifications Staff Digital Verification Engineer :** + Bachelor's degree in a technical ... to obtain and maintain a TS/SCI clearance with Polygraph.** **Preferred Qualifications Staff Digital Verification Engineer :** + Advanced Degree either MS or… more
- Renesas (Duluth, GA)
- Principal Digital Verification Engineer Job Description + Verification of DDR5 Data Buffer to meet functional and performance specifications. + Be able ... and/or improve design behavior. + Support in optimizing UVM based testbench. + Take ownership of verification...This exciting role is responsible for the development of digital sections of leading-edge memory data buffer chips for… more
- Broadcom (San Jose, CA)
- …Sign-In before you apply.** **Job Description:** Broadcom is looking for a senior level Digital Design Verification engineer . In this highly visible role you ... PhD in Electrical Engineering or Computer Engineering with 6+ years of experience in digital design verification + Hands on experience in SV UVM , SV RNM and … more
- Huntington Ingalls Industries (Fort Meade, MD)
- …Engineering, Computer Science, or a related field * Experience with modern digital verification and modeling languages: SystemVerilog, SystemC, C/C++, Matlab, ... short video: https://vimeo.com/732533072 Job Description Do you enjoy challenging digital design verification problems? HII Mission Technologies...etc. * UVM concepts * Directed, constrained-random, and assertion-based … more
- Amazon (Redmond, WA)
- …networking and satellite bus FPGAs A day in the life Kuiper Production team FPGA verification engineer . Create UVM verification simulation solutions. The ... Description Kuiper Production team FPGA Verification engineer . Creating & Maintaining ...will work with design and systems teams to define/develop/implement/test/release UVM test environments in order to verify FPGA based… more
- Huntington Ingalls Industries (Roanoke, VA)
- …Engineering, Computer Science, or a related field * Experience with modern digital verification and modeling languages: SystemVerilog, SystemC, C/C++, Matlab, ... short video: https://vimeo.com/732533072 Job Description Do you enjoy challenging digital design verification problems? HII Mission Technologies...etc. * UVM concepts * Directed, constrained-random, and assertion-based … more
- Northrop Grumman (Annapolis Junction, MD)
- …engineers to make these technologies a reality. **What You'll Get To Do:** As a Digital Verification Lead Engineer , you will have an opportunity to be ... Test (SEIT) department is seeking a Staff Lead Design Verification Engineer to join our team and...comprehensive test-benches for behavioral simulation + Design and implement verification strategies for complex digital systems +… more
- Northrop Grumman (Annapolis Junction, MD)
- …engineers to make these technologies a reality. **What You'll Get To Do:** As a Digital Verification Lead Engineer , you will have an opportunity to be ... Test (SEIT) department is seeking a **Staff Lead Design Verification Engineer ** to join our team and...comprehensive test-benches for behavioral simulation + Design and implement verification strategies for complex digital systems +… more
- SpaceX (Irvine, CA)
- Design Verification Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars ... ultimate goal of enabling human life on Mars. DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're...capabilities of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC and/or FPGA verification at block… more
- ManpowerGroup (Mountain View, CA)
- Our client, a leader in technology innovation, is seeking a Silicon Verification Engineer to join their team. As a Silicon Verification Engineer , you ... mindset, which will align successfully in the organization. **Job Title:** Silicon Verification Engineer **Location:** Mountain View, CA **What's the Job?** +… more
- Meta (Austin, TX)
- …entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with an ... of the art IPs or SoCs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers...years of hands-on experience in Verilog, SystemVerilog, C/C++ based verification and UVM methodology 10. 2+ years… more
- BAE Systems (Westminster, CO)
- …be available based on position level and/or job specifics. **Principal FPGA Verification Engineer ** **110108BR** EEO Career Site Equal Opportunity Employer. ... used across multiple projects. + Work in a System Verilog/ UVM environment developing tests, testbenches, UVM components,...(eg Ruby, Python, TCL). + Experience in documentation and verification of high-speed digital electronics, FPGAs, and… more
- Amazon (Boise, ID)
- …Fire TV and Amazon Echo. What will you help us create? As a Sr. Design Verification Engineer at Amazon, you will be part of an advanced engineering and research ... with team members across multiple disciplines - Deliver detailed test plans for verification of complex digital design blocks by working with design engineers… more
