- Actalent (Mountain View, CA)
- Job Title: Silicon Verification Engineer Job Description The Silicon Verification Engineer will play a crucial role in the test-plan generation process, ... creating, testing, and implementing various verification plans for advanced chips used in AI products....products. Responsibilities + Define, document, and implement a UVM verification environment, including agents and scoreboards. + Write test… more
- Meta (Sunnyvale, CA)
- …cases for multiple state of the art IPs or SoCs. **Required Skills:** Design Verification Engineer Responsibilities: 1 . Work with researchers and architects ... from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with a world-class… more
- Meta (San Diego, CA)
- …and test cases for multiple state of the art IPs. **Required Skills:** Design Verification Engineer Responsibilities: 1 . Work with researchers and architects ... from transistor, through architecture, to firmware, and algorithms.As a Design Verification Engineer at Meta Reality Labs, you will work with a world-class… more
- Meta (Austin, TX)
- …click "Apply to Job" online on this web page. **Required Skills:** ASIC, Design Verification Engineer Responsibilities: 1 . Develop functional tests based on ... years of experience involving each of the following: 7. 1 . System Verilog/UVM methodology or C/C++ based verification... 1 . System Verilog/UVM methodology or C/C++ based verification 8. 2. Track record of 'first-pass success' in… more
- Meta (Austin, TX)
- …teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1 . Propose, implement ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Formal … more
- Meta (Sunnyvale, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1 . Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design … more
- Meta (Austin, TX)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1 . Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design … more
- Meta (Salt Lake City, UT)
- …teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1 . Provide technical ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Formal … more
- Meta (Austin, TX)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1 . Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design … more
- Meta (Austin, TX)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1 . Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design … more
- Meta (Redmond, WA)
- …test cases for multiple state of the art IPs. **Required Skills:** Design Verification Engineer (University Grad) Responsibilities: 1 . Work with researchers ... from transistor, through architecture, to firmware, and algorithms.As a Design Verification Engineer at Meta Reality Labs, you will work with a world-class… more
- Meta (Austin, TX)
- …the art machine learning IPs. **Required Skills:** Design Verification Engineer - Machine Learning Accelerators Responsibilities: 1 . Work with ... stack, through algorithms to architecture, transistors to firmware. As a Design Verification Engineer at Meta's Reality Labs, you will work with a world-class… more
- System One (Bellevue, WA)
- System One is seeking highly motivated Senior Safety Verification and Validation Engineer to support our customer in Bellevue Washington. Remote opportunity for ... qualifying candidates. The Senior Safety Verification and Validation Engineer is part of...code benchmark. * Familiarity with EMDAP and Regulatory Guide 1 .203 is required. * Knowledgeable of nuclear systems thermal-hydraulic… more
- Fresenius Medical Center (Lawrence, MA)
- Sr. Verification Engineer , Fresenius USA, Inc., a...a hybrid position working 4 days/week at the office in Lawrence, MA and 1 day/week from home. **EOE, ... Engineering or a closely related field and 6 years of experience as a Verification Engineer in the medical device sector or (ii) a Master's degree (or an… more
- Qualcomm (San Diego, CA)
- … verification tests to identify and resolve design issues. In this role of Design Verification Engineer , you will be using advanced state of the art tools, ... setting benchmarks in the whole industry. As an SOC Verification and Methodology Engineer , you will be...Master's degree in Science, Engineering, or related field and 1 + year of ASIC design, verification , validation,… more
- Axiom Space (Houston, TX)
- …and life itself, for the benefit of all on Earth and beyond. **The Systems Engineer - Verification & Validation (V&V) will work on-site in Houston, Texas** and ... will be primarily focused on our verification and validation planning, implementation, and closeout. This role...of 6 years SE experience with a minimum of 1 year in V&V. + Effective in working in… more
- Axiom Space (Houston, TX)
- …and life itself, for the benefit of all on Earth and beyond. **The Systems Engineer - Verification & Validation (V&V) & Test will work on-site in Houston, ... operations. **The role will be primarily focused on our verification and validation strategy, planning, and implementation then transitioning...of 6 years SE experience with a minimum of 1 year in V&V. + Effective in working in… more
- Qualcomm (Santa Clara, CA)
- …work experience. OR Master's degree in Science, Engineering, or related field and 1 + year of ASIC design, verification , validation, integration, or related work ... connected future for all. The team is responsible for the complete verification lifecycle, from system-level concept to tape out and post-silicon support. The… more
- The Boeing Company (Tukwila, WA)
- …& Weapons Systems has an exciting opportunity for an **ASIC and/or FPGA Design and Verification Engineer ** (Experienced, Lead or Senior) to join us as part of ... Surveillance and Mobility; and Autonomous Systems). As an ASIC/FPGA Engineer on the Boeing Electronic Products team you will...and around the world and support ASIC/FPGA design and verification for electronics that we build in El Segundo… more
- Broadcom (San Jose, CA)
- **Please Note:** ** 1 . If you are a first time user,...is looking for a senior level Mixed Signal Design Verification engineer . In this highly visible role ... Engineering 8+ years of experience in Mixed Signal Design Verification or MSc in Electrical Engineering or Computer Engineering...6+ years of of experience in Mixed Signal Design Verification + Hands on experience in SV UVM, SV… more