- Butler Aerospace and Defense (Orlando, FL)
- ASIC & FPGA Design Engineer Location: Orlando, FL Job ID: #69823 Pay Range: $75-87/hr 12 monthsActive Secret Clearance is preferred. Candidates must have ... ability to obtain Interim Secret Clearance.Seeking for an experience FPGA design and verification engineer , candidate must have both design and verification… more
- Tech Providers Inc. (Plymouth, MN)
- Hardware Engineer (Analog Mixed Signal IC Design Engineer )Location: Plymouth, MN 55441 (Remote is an option for exceptional profiles)Experience : 8+ ... project, we will only need US Citizen for this role. Duties: Lead the design of ASIC I/O and supporting circuitry. Build Requirements and architect… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is ... possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging… more
- Micron Technology, Inc. (Minneapolis, MN)
- …and collaborative skills in this exciting and outstanding opportunity. We're looking for a Principal Physical Design Engineer ( ASIC ) to join our team! ... design , layout, and optimization of Memory/Logic/Analog circuits. + Chip floor-planning, physical design , IP integration, static timing analysis, design … more
- Micron Technology, Inc. (Minneapolis, MN)
- …in this exciting and outstanding opportunity. **Job Description** We're looking for a Principal Physical Design Engineer to join our team! In this position, ... Oversee definition, design , verification, and documentation for physical ASIC flow development. + Conducts experimental...+ 10+ years' experience as a Place & Route Engineer + Experience with Cadence Tools (Genus/Innovus/Tempus) and Mentor… more
- Amazon (Cupertino, CA)
- …we're handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze ... - BS + 4yrs or MS + 3yrs in EE/CS - 4+ years of experience in ASIC Physical Design from - RTL-to-GDSII in either 7nm, 14/16nm, 20nm, or 28nm - Block … more
- SpaceX (Sunnyvale, CA)
- Principal FPGA/ ASIC Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... this possible, with the ultimate goal of enabling human life on Mars. PRINCIPAL FPGA/ ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging… more
- Microsoft Corporation (Redmond, WA)
- …(CryoCMOS) team, is looking for a **Senior Quantum Digital Application-Specific Integrated Circuit ( ASIC ) Design Engineer ** to work as digital Application ... are looking for **Senior Quantum Digital Application-Specific Integrated Circuit ( ASIC ) Design Engineer ** who is...Level (RTL) entry + RTL to GDS implementation in Physical Design domain, from synthesis to place… more
- Microsoft Corporation (Redmond, WA)
- …(CryoCMOS) team is looking for a **Senior Quantum Analog Application-Specific Integrated Circuit ( ASIC ) Design Engineer ** to work as an Application Specific ... environment. We are looking for a **Senior Quantum Analog Application-Specific Integrated Circuit ( ASIC ) Design Engineer ** who is as passionate about their… more
- Qualcomm (Santa Clara, CA)
- …Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design , verification, validation, integration, or related work experience. OR ... Science, Engineering, or related field and 1+ year of ASIC design , verification, validation, integration, or related...systems modelling language proficiency is a plus - WIFI Physical layer knowledge is a plus **Principal Duties &… more
- Google (Madison, WI)
- …or PhD in Electrical Engineering or Computer Science. + 4 years of experience in digital/ ASIC design using SystemVerilog or RTL. + Experience in one or more ... + Work independently and collaboratively to create and review ASIC /SoC subsystem design architecture and microarchitecture specifications....and debug design RTL. + Work with physical design teams to ensure design… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the ... synthesis/timing clean design while working with the physical design team to ensure a routable...Systems design . + A deep understanding of ASIC design flow including RTL design… more
- ManpowerGroup (New Almaden, CA)
- **Senior ASIC Design Engineer ** Our client in **San Jose, CA** is looking for hardworking, motivated talent to join their team. Don't wait apply today! ... Holiday Pay, Referral program bonus, etc. **Job Description** + Focus on analog/mixed-signal ASIC design in advanced nodes. + Manage PDK libraries and drive… more
- Honeywell (Plymouth, MN)
- …a USG Secret security clearance is required WE VALUE + General experience in ASIC concepts and design + Experience working in multi-disciplinary teams + ... + Lead efforts to map customer designs into Honeywell's ASIC technology + Timing constraints + Simulation + Conduct...Background in BIST, Design For Test (DFT), physical synthesis, static… more
- Micron Technology, Inc. (Minneapolis, MN)
- …your individual and collaborative skills in this exciting and outstanding opportunity. As a Digital Design Engineer in Micron's ASIC logic design team, ... a driven individual looking to advance into the high-speed ASIC and memory controller design industry. **What's...and BEOL teams from Design Verification, Analog Design , and Modeling to Synthesis and Physical … more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... floor-planning and back end team to help craft the physical floorplan of the chip. The team explains the...team member, you will be collaborating with other architects, ASIC designers and verification engineers to design … more
- SpaceX (Irvine, CA)
- …generation and verification and timing closure + Work closely with chip architecture, design verification, physical design , DFT, and power teams to ... Sr. SOC/ ASIC Timing Signoff & Front-End Implementation Engineer...+ Experience with test modes, mode merging to optimize physical design implementation and STA Signoff. +… more
- Butler America (Grand Prairie, TX)
- ASIC & FPGA Design Engineer Location: Grand Prairie, TX Job ID: #68105 Pay Range: $83-96 ph (W2) Duration: 6 - 12 mos Active Secret Clearance needed ... Develops, designs, verifies, and documents Application-Specific Integrated Circuits ( ASIC ) and Field Programmable Gate Arrays (FPGA) development. Determines… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The Clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... floor-planning and back end teams to help craft the physical floorplan of the chip and explains the programming...team member, you will be collaborating with other architects, ASIC designers and verification engineers to design … more
- Qualcomm (San Diego, CA)
- …cases using PowerArtist and PrimeTime PX (PTPX) and work with cross-functional teams - design , implementation, and physical design teams - to optimize power. ... design , verification, synthesis, timing/STA, UPF, CLP, LEC formal verification, DFT, physical design .) + Hands-on experience in writing scripts for automation… more
