• Sr ASIC Modem design Engineer

    Amazon (Austin, TX)
    …at Amazon! We're hiring a Sr. Modem Engineer within a high performance ASIC design team. This team is using industry leading methodologies to develop ... in silicon from system specification to chip specification to RTL to optimizing timing / power to chip level...models in MATLAB. - Involve in control plane logic design and interfaces to bus fabrics. - Explore and… more
    Amazon (06/04/24)
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  • Senior Principal Front End ASIC

    BAE Systems (San Jose, CA)
    …be available based on position level and/or job specifics. **Senior Principal Front End ASIC Design Engineer (Hybrid)** **102613BR** EEO Career Site Equal ... designer who has strong proficiency in both + ASIC design - performing architecture design , RTL coding/simulation, timing closure at layout phase +… more
    BAE Systems (06/07/24)
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  • Processor RTL Design Engineer

    Qualcomm (San Diego, CA)
    …Audio, Modem, Machine learning, IoT and Automotive. This position involves in-depth understanding of the ASIC design flow from RTL to GDS2 and the challenges ... advanced technologies. The successful candidate will possess detailed understanding of RTL design , synthesis, static timing analysis, formal verification, PLDRC,… more
    Qualcomm (04/07/24)
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  • Sr. ASIC Design Engineer

    SpaceX (Sunnyvale, CA)
    Sr. ASIC Design Engineer , DDR IP (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER , DDR IP...Controller/PHY IP core development and integration + Responsible for RTL design , synthesis, timing constraints, power estimation,… more
    SpaceX (03/29/24)
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  • RTL Design Engineer , TPU…

    Google (Sunnyvale, CA)
    …problems. + Knowledge of processor design , accelerators, or memory hierarchies. As a RTL Design Engineer , you will be part of a team developing ... subsystem's design microarchitecture specifications. + Develop SystemVerilog RTL to implement logic for ASIC products...teams to create test plans to verify, and debug design RTL . + Work with Physical … more
    Google (06/21/24)
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  • ASIC Engineer , Implementation

    Meta (Austin, TX)
    …Area. 14. Knowledge of front-end and back-end ASIC tools. 15. Experience with RTL design using SystemVerilog or other HDL. 16. Experience managing multiple ... on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run Logic/Physical Synthesis using… more
    Meta (06/05/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This ... & bus protocols, interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL design , verification, logic synthesis… more
    NVIDIA (06/12/24)
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  • Sr. SOC/ ASIC Physical Design

    SpaceX (Redmond, WA)
    Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Redmond, WA SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON...drive architectural feasibility studies, develop timing, power and area design targets, and explore RTL / design more
    SpaceX (05/17/24)
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  • ASIC Design Engineer

    Amazon (Cupertino, CA)
    …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and ... job responsibilities - As a key member of the ASIC design team, you will implement and...related technical field - 5+ years of experience in RTL design for SOC - 5+ years… more
    Amazon (03/29/24)
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  • Senior ASIC Physical Design PPA…

    NVIDIA (Santa Clara, CA)
    …those, and incorporating those in NVIDIA's designs + Apply knowledge and gain experience in ASIC design including RTL and logic design , physical and ... looking for a motivated Senior ASIC Physical Design PPA (Performance, Power, Area) Engineer to...to work across different domains of ASIC design , collaborate and work with Arch, RTL ,… more
    NVIDIA (06/06/24)
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  • Design Methodology - ASIC

    Micron Technology, Inc. (Atlanta, GA)
    …that are transforming how the world uses information to enrich life. As a Design Engineer at Micron Technology, Inc., you will be responsible for designing ... **How To Qualify:** + Proven knowledge/experience of CMOS Circuit Design on RTL , gate, and transistor levels....for logic or mixed-signal circuits, asynchronous digital designs & ASIC RTL integration. + Strong fundamental knowledge… more
    Micron Technology, Inc. (05/25/24)
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  • SOC/ ASIC Synthesis & Front-End STA…

    SpaceX (Sunnyvale, CA)
    SOC/ ASIC Synthesis & Front-End STA Engineer ...design and timing closure + Deep understanding of ASIC design flow, top-down and bottom-up ... the ultimate goal of enabling human life on Mars. SOC/ ASIC SYNTHESIS & FRONT-END STA ENGINEER (SILICON...fast, reliable internet to millions of users worldwide. We design , build, test, and operate all parts of the… more
    SpaceX (05/09/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for a Senior ASIC Design Engineer for our Memory Controller team! As a Senior ASIC Engineer , you'll join a group of hard-working ... take part in IP core and IP integration level RTL design , synthesis, functional verification, and timing...years of meaningful experience with all stages in the ASIC design flow including functional and formal… more
    NVIDIA (05/03/24)
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  • Camera Imaging ASIC Design

    Qualcomm (Santa Clara, CA)
    …> Camera Engineering **General Summary:** The Multimedia Camera HW team is looking for strong ASIC design engineer for an exciting opportunity to be involved ... algorithms + Own and deliver core level IP + RTL design + Run synthesis, review results...+ Experience with System Verilog or System C + ASIC implementation of Image Processing Camera IP + Experience… more
    Qualcomm (05/24/24)
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  • Sr. ASIC Physical Design

    SpaceX (Irvine, CA)
    Sr. ASIC Physical Design Methodology/CAD Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity ... ultimate goal of enabling human life on Mars. SR. ASIC PHYSICAL DESIGN METHODOLOGY/CAD ENGINEER ...project tracking and visualizing results/stats + Interface directly with RTL , physical design , package design ,… more
    SpaceX (06/13/24)
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  • ASIC Design Verification…

    Meta (Austin, TX)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Design Verification Engineer Responsibilities:...scratch. 9. Experience debugging fails to the line of RTL , closing out bug fixes, using Verdi or equivalent… more
    Meta (05/09/24)
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  • Senior Principal IC ( RTL to GDSII)…

    Cadence Design Systems, Inc. (Austin, TX)
    …degree and a strong technical knowledge of company products. Position Requirements: * Design experience should include ASIC design using industry-standard ... with leading edge Wireless and Mobile Customers * Senior level Application Engineer position supporting RTL -to-GDS implementation flows using Encounter Digitial… more
    Cadence Design Systems, Inc. (04/27/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for a Senior ASIC Design Engineer for our Memory Controller team! As a Senior ASIC Engineer , you'll join a group of hard-working ... the opportunity to be responsible for the micro-architecture and design including RTL design , synthesis,...of relevant and proven experience and a background in ASIC design (Graphics, Microprocessors, Network Processors, or… more
    NVIDIA (05/16/24)
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  • ASIC Engineer , Design

    Meta (Sunnyvale, CA)
    …To apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Work on architecture exploration and ... micro-architecture development. 2. Perform RTL development using Verilog, System Verilog and HLS. 3....12. 5. Logic synthesis and optimization 13. 6. Physical Design (ECO) and 14. 7. Hardware/ ASIC lab… more
    Meta (05/07/24)
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  • CPU RTL Power Engineer

    Qualcomm (Austin, TX)
    RTL power modeling and estimation experience. * Deep understanding of CPU or ASIC low power design including expertise in active and Idle power optimization, ... fast-paced and dynamic environment **Roles and Responsibilities** As an RTL Power engineer you will own and/or...tool) and optimize power at various stages of the design to meet targets working with architecture, RTL more
    Qualcomm (06/13/24)
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