We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- Qualcomm (Santa Clara, CA)
- …preferred + Experience in CPU sub system-based design is preferred + Experience in low power design from project start to volume chip production for ... in SoC low power micro-architecture, low power design and methodology,...influence over key organizational decisions (eg, is consulted by senior leadership to make key decisions). * Tasks do… more
- NVIDIA (Santa Clara, CA)
- …daily basis. + Good understanding of concepts of energy consumption, estimation, data movement and low power design . + Familiarity with Verilog and ASIC ... We are looking for a Senior Emulation Power Engineer! NVIDIA prides...intelligence workloads, and will allow us to influence architectural, design , and power management improvements. What You'll… more
- NVIDIA (Santa Clara, CA)
- …fields. + Strong understanding of concepts of energy consumption, estimation, data movement and low power design . + Familiarity with Verilog and ASIC ... We are now looking for a Senior Power Optimization and Analysis Engineer!...Software Engineers, ASIC Design Engineers, and Physical Design teams to study and implement power … more
- NVIDIA (Santa Clara, CA)
- …is fueled by its great technology and amazing people. We are seeking a Senior Power and Performance Architect to influence, innovate and drive next generation ... power management features and solutions, through system architecture, design and productization; working with multi-functional teams across the company. +… more
- NVIDIA (Santa Clara, CA)
- …this massive superchip. We are looking for expert engineers to come and help design Datacenter level power management solutions for next generation scaling AI ... of technologies. You will play a key role in power management software architecture, design and implementation;...system, algorithms and data structures. + In depth knowledge low level power management fundamentals like DVFS,… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior Applied Power Architect - GPU. NVIDIA is known as a world leader in providing energy-efficient high-performance products, and we ... + MSEE/MSCE, preferably PhD, or equivalent experience with a specialization in low - power -processor architectures. + Strong knowledge of energy efficient system … more
- NVIDIA (Santa Clara, CA)
- …energy efficient chip/system design fundamentals and related tradeoffs. + Familiarity with low power design techniques such as multi-VT, Clock gating, ... We are looking for a Senior Datacenter GPU Power Architect. NVIDIA...improvements. + Pre-silicon thermal analysis for next-gen GPUs including design of thermal usecases, power map for… more
- NVIDIA (Santa Clara, CA)
- …(in design and process) and craft solutions to address those + Explore and implement low power design ideas by finding the right balance with timing and ... looking for a motivated Senior ASIC Physical Design PPA (Performance, Power , Area) Engineer to...physical design and timing of high-frequency and low - power designs + Focus on improving the… more
- NVIDIA (Santa Clara, CA)
- …you will be responsible for the design and implementation of high-performance, low power CPU sub-system modules. You will work closely with architects, ... We are looking for a Senior CPU Design Engineer! NVIDIA is... skills to optimize and meet performance, timing and power targets. + Deliver a synthesis/timing clean design… more
- The Boeing Company (Mountain View, CA)
- …& Weapons Systems has an exciting opportunity for multiple **ASIC and/or FPGA Design and Verification Engineers** at Lead, Senior & Principal levels to ... robust, high-performance custom processors using the latest ARM IP to enable high-integrity, low SWAP-C flight computers. Plus, we're applying the latest digital IC … more
- NVIDIA (Santa Clara, CA)
- …+ Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing closure, and design documentation. + Collaborate with ... We are now looking for a Senior Logic Design Engineer! Asa member...with implementation to achieve your timing, area, performance and power goals. + Assist with timing closure of super… more
- Capgemini (Santa Clara, CA)
- …**Job Location: Santa Clara CA** **Job description:** We are looking for Senior Design Verification Engineer **Key responsibilities:** . Proficient in System ... **Nice to have skills:** . GLS verification knowledge . Low power - UPF - verification ....end-to-end services and solutions leveraging strengths from strategy and design to engineering, all fueled by its market leading… more
- NVIDIA (Santa Clara, CA)
- …working with layout (drc, lvs) and PnR tools is required. + Hands on experience in design and analysis of low power circuits ( power gating, decaps, ... innovative circuits for hardware security, adaptive clocking and power management solutions + Drive the design ...and power management solutions + Drive the design and physical implementation of custom digital IPs from… more
- NVIDIA (Santa Clara, CA)
- …you'll be doing: + Drive physical design and timing of high-frequency and low - power CPUs, GPUs, SoCs at block level, cluster level, and/or full chip level. ... We are now looking for a motivated Physical Design and Timing Engineer to join our dynamic...including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and ECO implementation. + Work in a… more
- Capgemini (Santa Clara, CA)
- …Debug skills at IP and subsystem level Good to have: * GLS verification knowledge * Low power - UPF - verification * ARM based SoC level verification experience ... to transform and manage their business by harnessing the power of technology. The Group is guided every day...end-to-end services and solutions leveraging strengths from strategy and design to engineering, all fueled by its market leading… more
- Google (Sunnyvale, CA)
- …1 year with an advanced degree. + 3 years of experience with hardware design , and data structures or algorithms. + 3 years of experience developing compute/storage ... Computer Science. + Experience with distributed systems, OS/kernel, network system design , and large-scale storage systems. + Experience with interfacing to… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …definition, as well as RTL design to achieve high performance and low power . Familiarity with NoC technology and concepts, AMBA protocols (AXI, AHB, ... an impact on the world of technology. Successful applicant will participate in the design and development of a fully configurable and fully featured Network on Chip… more
- Qualcomm (Santa Clara, CA)
- …of the entire chip . Design quality check such as lint, CDC and low power rule checks . RTL-level and gate-level vector-based power analysis **Minimum ... development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers...design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit… more
- Microsoft Corporation (Mountain View, CA)
- …equivalence failures. + Perform cross-functional decision making across UPF (Unified Power Format)/ Low Power methodology/architecture, DFT methodology, ... DFT methodology and handling DFT constraints for Logical Equivalence + Timing Constraints/ Low Power Static verification flows to augment pure functional… more
- NVIDIA (Santa Clara, CA)
- …complexities. + Basic understanding of fundamental concepts of energy consumption, estimation, and low power design . + Desire to bring quantitative ... and Analysis Team, you will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and… more