- NVIDIA (Durham, NC)
- …of relevant work or research experience + Exposure to Computer Architecture, ASIC design and verification methodology is required + Strong ability with ... for our Memory Management Unit. NVIDIA is seeking outstanding ASIC Verification Engineer to verify the world's...designs is a huge plus. + Experience with Universal Verification Methodology (UVM), SystemVerilog checkers and scoreboards.… more
- NVIDIA (Hillsboro, OR)
- …years of verification experience + Exposure to Computer Architecture, ASIC design and verification methodology is required + Strong ability with ... NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the...working across many NVIDIA teams from software, to architecture, design , methodology , and more. The GPU is… more
- Google (Sunnyvale, CA)
- …chip execution by creating and deploying design platforms. As an ASIC Design Verification and Methodology Engineer, you will be the catalyst for ... Senior Design Verification and Methodology ...Senior Design Verification and Methodology Engineer, Google Cloud...Methodologies to address and resolve critical issues in current ASIC and SoC design and verification… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Methodology /CAD Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN METHODOLOGY /CAD ENGINEER (SILICON ENGINEERING) At SpaceX… more
- NVIDIA (Austin, TX)
- NVIDIA is looking for an ASIC Design Engineer with proven hardware design and methodology expertise to join our world-class team to help amplify human ... out from the crowd: + Prior experience in ASIC verification . + Knowledge of Clocks/Resets design and verification . + Exposure to CDC related design… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer, Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer, Design Verification Responsibilities: 1. Define and… more
- ManpowerGroup (Phoenix, AZ)
- **Job Title: Physical Verification Engineer ( ASIC Design )** **Location: USA & Canada (Remote is OK, Phoenix or Ottawa preferred)** **Role Overview** As a ... Engineer** , you will be responsible for ensuring that ASIC layouts meet all foundry design rules...and final report generation. + Collaborate with CAD and methodology teams to refine verification flows and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Design Verification to build IP and System...to partner and collaborate with full stack software, hardware, ASIC Design , Emulation and Post-Silicon teams towards… more
- Meta (Sunnyvale, CA)
- …To apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Verification Engineer Responsibilities: 1. Develop and execute verification ... and verification languages (eg SystemVerilog) with in UVM (Universal Verification Methodology ) 13. Creating and maintaining testbenches and test cases… more
- Northrop Grumman (Jessup, MD)
- …+ Experience with FPGA or ASIC + Knowledge of Universal Verification Methodology (UVM) + Experience with scripting languages (Bash, Perl, Python, ... FPGA or ASIC + Knowledge of Universal Verification Methodology (UVM) + Experience with scripting...with Polygraph. + Experience with Mentor Graphics and/or Cadence Verification tools - FPGA/ ASIC Design … more
- Meta (Harrisburg, PA)
- …ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design , Emulation and Post-Silicon teams towards creating a first-pass ... Verification 2. Propose, implement and evangelize the Formal Verification Methodology to be used across the...equivalent practical experience 9. 8+ years of experience in Design Verification 10. 5+ years of experience… more
- NVIDIA (Austin, TX)
- …proven design verification experience + Experience in pre-silicon verification (UVM, SystemVerilog), ASIC design /implementation flow, and design ... NVIDIA is looking for a Senior ASIC Verification Engineer to help verify...components using SV/UVM methodology + Driving coverage-based verification closure + Collaborate with design teams… more
- Micron Technology, Inc. (Boise, ID)
- …test solutions and enhancing system performance. **Responsibilities** + Derive SoC/FPGA and/or ASIC design specifications from system requirements + Using HDL, ... in Electrical Engineering or related discipline. + Proficiency with FPGA/ ASIC design using HDL such as Verilog/VHDL...AMD/Xilinx Vivado, or Altera/Intel Questa + Knowledge of UVM methodology for verification . + Expertise in laboratory… more
- Broadcom (Fort Collins, CO)
- …of software products and usage methodology to a world-wide, cutting edge, ASIC Design technology development and implementation team. These tools are used to ... have a Candidate Account, please Sign-In before you apply.** **Job Description:** ** ASIC Design Automation Engineer** Broadcom's ASIC Products Division… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding ASIC Verification Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This position ... of relevant work or research experience + Strong history of working on verification methodology , creating reusable verification components + Knowledgeable in… more
- NVIDIA (Austin, TX)
- NVIDIA is seeking an outstanding Senior ASIC Verification Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This ... (or equivalent experience) + 5+ years of experience + Experience with verification methodology , creating reusable verification components + Knowledgeable… more
- Teradyne (North Reading, MA)
- …the digital logic verification using SystemVerilog & Universal Verification Methodology (UVM) + Experience in logic design writing RTL in Verilog HDL ... Design Engineering team is seeking a digital logic Verification Engineer who preferably also has experience in FPGA...logic verification , preferably using SystemVerilog & Universal Verification Methodology (UVM) + Familiarity with PCIe,… more
- Cisco (San Jose, CA)
- …of a smaller, startup-style team. You'll collaborate with exceptional talent with deep ASIC design and development expertise. As part of a systems company, ... networks. Cisco's silicon team offers a unique experience for ASIC engineers, combining the resources and stability of a...first customer shipments. **Your Impact** You are a diligent Design /SDC Engineer with strong analytical skills and a deep… more
- Cisco (Maynard, MA)
- …or Electrical Engineering and 4+ years of related experience * Hands-on experience in ASIC physical design and implementation * Experience with floor planning & ... networks. Acacia's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a... team can provide. Your Impact As a Physical Design Engineer, you will play a key role in… more