- Amazon (San Diego, CA)
- Project Kuiper Digital Chip Socs Engineer Be part of Project Kuiper's sub-team responsible for defining and implementing the digital chip SOCs for communications via ... Work with tool vendors and drive enhancements in emulation methodology Participate in the validation of FPGAs using test...using test benches, which can be reused for the ASIC implementation Run formal verification of complex blocks to… more
- Amazon (Austin, TX)
- Senior Cad Engineer Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband ... connectivity. The role: As Senior Cad Engineer you will be responsible for installing and maintaining...opportunity to define the digital design environment and deploy methodology of a new project from day one. You… more
- DBSI Services, Inc. (Milpitas, CA)
- Benefits: 401(k) 401(k) matching Relocation bonus Job Title: Front-End ASIC Design Engineer Job Description: Milpitas, CA Description Responsibilities Include ... the work experience is solid micro-architecture and front-end design. *Hands-on ASIC front-end design, ideally in design services environments (product backgrounds… more
- Etched (San Jose, CA)
- …chain-of-thought reasoning agents. Job Summary We are seeking a highly motivated Manufacturing Test Engineer to join our team. In this role, you will bridge the gap ... advanced AI systems. You will collaborate closely with cross-functional teams, including ASIC design and software engineering, to build and optimize test processes… more
- Planet Pharma (St. Paul, MN)
- …design of Integrated Circuits (IC), or Application Specific Integrated Circuits ( ASIC ). Prefered: Strong preference for individuals familiar with AMD/Xilinx Zynq ... to support verification of above applications, including Universal Verification Methodology (UVM) and constrained random techniques. Familiarity with requirements… more
- Marvell Technology, Inc. (Westborough, MA)
- …place to thrive, learn, and lead. Your Team, Your Impact As a Staff Physical Design Engineer at Marvell Technology, you will be a key part of a highly skilled global ... focused on designing next-generation high-performance processor chips. Our custom Processor/ ASIC solutions power critical infrastructure in markets such as server,… more
- Amazon (Sunnyvale, CA)
- …Amazon Echo, and the Astro personal robot. What will you help us create? As an ASIC Methodology / CAD engineer you will create and maintain automated design ... flows that improve the efficiency and design quality of the finished ASIC products. Key job responsibilities - Develop automated flows for improving the SoC design… more
- Amazon (Cupertino, CA)
- …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze ... + 10yrs or MS + 7yrs in EE/CS - 5+ years developing physical design methodology or CAD flows in synthesis, PNR, and sign-off areas for advanced technology nodes. -… more
- NVIDIA (Santa Clara, CA)
- We are now looking for an ASIC Design Efficiency Engineer . NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and ... performance and efficiency. + Understand the design and implementation, develop methodology and infrastructure to drive Performance, Power and Area (PPA)… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our invention ... and intelligence. Make the choice to join us today. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading GPU and SoC's.… more
- Lockheed Martin (Denver, CO)
- **Description:** Join Our Team as an ** ASIC & FPGA Lead Verification Engineer ** where you will support over 50 different programs and research and development ... world, and are seeking a highly talented and motivated ** ASIC & FPGA Verification Engineer ** who has...a given design\. * Use SystemVerilog and Universal Verification Methodology \(UVM\) to verify a design in a Linux\-based… more
- Meta (Austin, TX)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...Meta 7. 3+ years of hands-on experience in SystemVerilog/UVM methodology or C/C++ based verification 8. 3+ years experience… more
- Cisco (San Jose, CA)
- Senior ASIC Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1431806) + Location:San Jose, California, US + Area of InterestEngineer - Hardware ... provider networks. Cisco's silicon team provides an outstanding, unique experience for ASIC engineers by combining the resources offered by a sizable multi-geography… more
- Meta (Austin, TX)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...cycles 9. 8+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification 10. 8+ years experience… more
- Meta (Austin, TX)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...experience 8. 6+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification 9. 6+ years of… more
- Cisco (San Jose, CA)
- …aspects of our systems, leveraging the latest technology. We're seeking a talented ASIC engineer with a proven track record in high-performance products, ready ... ASIC Design Engineer - Design &...block or top-level IP integration + Helping develop efficient methodology to promote block level SDCs to fullchip, and… more
- Palo Alto Networks (Santa Clara, CA)
- …interfaces. Within the Hardware team, you collaborate closely with Board Design, ASIC Design, PCB Layout, and Validation Test. You will also collaborate ... Engineers. **Your Impact** + Collaborate with a cross-functional team including: ASIC , Board design, PCB layout, Operations supply base management, Platform Software… more
- NVIDIA (Durham, NC)
- … Engineer for our Memory Management Unit. NVIDIA is seeking outstanding ASIC Verification Engineer to verify the world's leading GPUs. This position ... work or research experience + Exposure to Computer Architecture, ASIC design and verification methodology is required...to Computer Architecture, ASIC design and verification methodology is required + Strong ability with SystemVerilog, C… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking best-in-class ASIC Verification Engineer to verify the world's leading GPUs. In this role, you will be doing unit level verification of the ... across many NVIDIA teams from software, to architecture, design, methodology , and more. The GPU is used in applications...Strong communication and problem solving skills + Exposure to ASIC design, ASIC verification and computer architecture,… more
- Meta (Lincoln, NE)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide technical ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the...Verification 2. Propose, implement and evangelize the Formal Verification Methodology to be used across the group, both at… more
