- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Power Engineer ! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on ... are expected to understand the design and implementation, develop power metrics and drive power reductions +...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more
- NVIDIA (Westford, MA)
- …to amplify human inventiveness and intelligence. NVIDIA is seeking an outstanding Senior ASIC Power Integrity Engineer who is dedicated to collaborating ... significant impact! What you'll be doing: + Ensuring robust power integrity in physical design to optimize power... power integrity in physical design to optimize power delivery. + Design and optimize physical design solutions… more
- Google (Sunnyvale, CA)
- …a related field, or equivalent practical experience. + 3 years of experience in ASIC design or equivalent practical experience. + Experience in chip power ... Electrical Engineering, Computer Science, or a related field. + Experience performing chip power analysis using EDA tools such as PTPX, PowerArtist, or PrimePower. +… more
- The Boeing Company (Mountain View, CA)
- …Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Engineer on the Boeing Electronic Products team you will develop ... determine the optimal parts, weighing Schedule, Cost, Risk, Area, Power (SCRAP) vs. performance + Implement FPGA/ ASIC ...Area, Power (SCRAP) vs. performance + Implement FPGA/ ASIC with latest design practices and tools from block-level… more
- SpaceX (Redmond, WA)
- FPGA/ ASIC Design Engineer (Silicon Engineering) Redmond, WA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... the ultimate goal of enabling human life on Mars. FPGA/ ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX...integrate design blocks using Verilog/SystemVerilog + Optimize designs for power , performance and area + Participate in the design… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- SpaceX (Bastrop, TX)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out exploring ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- SpaceX (Irvine, CA)
- Sr. ASIC Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX...to solve complex problems including clock domain crossings and power optimization + ASIC /SoC system integration experience… more
- Cisco (San Jose, CA)
- Senior ASIC Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1431806) + Location:San Jose, California, US + Area of InterestEngineer - Hardware ... Cisco's silicon team provides an outstanding, unique experience for ASIC engineers by combining the resources offered by a...+ Implement Verilog RTL to meet timing, performance, and power requirements. + Contribute to full chip integration and… more
- Palo Alto Networks (Santa Clara, CA)
- …integrity analysis of ASIC and multi-chip-module designs + Model and analyze power delivery networks for ASIC /package/module and PCB + Create SI test plan ... background in hands-on design and validation of high-speed PCB and ASIC package development + Power integrity design and analysis and well versed in PI… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Floorplan Design Engineer ! NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world's ... chip development. + Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities +… more
- Cisco (San Jose, CA)
- ASIC Verification Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1431425) + Location:San Jose, California, US + Area of InterestEngineer - Hardware ... work with SDK and Software teams as part of ASIC development to create a flawless handshake between hardware...innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the… more
- Cisco (San Jose, CA)
- …aspects of our systems, leveraging the latest technology. We're seeking a talented ASIC engineer with a proven track record in high-performance products, ready ... ASIC Design Engineer - Design &...innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the… more
- Cisco (San Jose, CA)
- ASIC Design Verification Engineer , Technical Leader Apply (https://jobs.cisco.com/jobs/Login?projectId=1447177) + Location:San Jose, California, US + Area of ... be in the Silicon One development organization as an ASIC design verification engineer in San Jose,...innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the… more
- Meta (Lincoln, NE)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide technical ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the...clock domain crossing, IP-XACT based register verification and low power 22. Experience with development of fully automated flows… more
- Meta (Austin, TX)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical ... **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure organization. We...and generate optimized Gate Level Netlist for Timing, Area, Power 2. Debug the timing/area/congestion issues and work with… more
- NVIDIA (Santa Clara, CA)
- NVIDIA Networking Clock design team is looking for experienced top notch ASIC design engineer to work on next generation of NVIDIA Networking chips. We're ... and design next generation clock topologies and modules. + ASIC Clock scheme definition. + Improve Power ,...+ ASIC Clock scheme definition. + Improve Power , Performance, and Area (PPA) of state-of-the-art NVIDIA chips… more
- Palo Alto Networks (Santa Clara, CA)
- …- just to name a few! At Palo Alto Networks, we believe in the power of collaboration and value in-person interactions. This is why our employees generally work full ... on the development of ASICs, FPGAs and Systems that power Palo Alto Network's Next Generation Firewall platforms **Your...Development - Assembler, Debugger, Simulator + Infrastructure to support ASIC team development and verification + ASIC … more
- NVIDIA (Santa Clara, CA)
- …tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic and growing team! If you ... intelligence. What You'll Be doing: + As a Front-End ASIC Synthesis Engineer , you will own RTL...timing, area, congestion tradeoffs + Drive timing closure and power /area optimization across multiple design blocks + Work with… more
- NVIDIA (Madison, AL)
- We are now looking for a Senior ASIC Design Engineer ! NVIDIA is seeking an outstanding ASIC Design Engineer to design and implement an MMU for the ... What you'll be doing: + As a Senior Design Engineer at NVIDIA, you will be responsible for the...the challenge of crafting the highest performance & lowest power silicon possible? If so, we want to hear… more