- Meta (Lincoln, NE)
- **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide… more
- Amazon (Austin, TX)
- …be responsible for defining and checking the specification of critical hardware modules using formal methods and industrial model checkers. You will be a part of a ... 2022 and September 2025. * Completed coursework or prior internship experience with formal methods (SW/HW) * Coursework or prior internship experience in the basics… more
- Lockheed Martin (Denver, CO)
- **Description:** Join Our Team as an ** ASIC & FPGA Lead Verification Engineer ** where you will support over 50 different programs and research and ... world, and are seeking a highly talented and motivated ** ASIC & FPGA Verification Engineer **...test pattern generation, logic equivalency checking, linting and/or other formal design checks\. * Knowledge of space\-grade/qualified FPGAs and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities:...or more of the following areas along with functional verification - SV Assertions, Formal , Emulation. 20.… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... you will be able to use other approaches like Formal and Emulation to achieve a bug-free design. The...teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities:… more
- Qualcomm (Santa Clara, CA)
- …such as SystemVerilog-UVM, coverage development, assertion model development and formal verification (property checking). Learn and deploy power-aware ... closely related field + 2+ years of experience with ASIC design and verification tools, techniques, and...as UVM or OVM and exposure to Assertion based Formal Verification + 3+ years of experience… more
- Qualcomm (San Diego, CA)
- …that meet performance, security, technology, and feature requirements. As a Design Verification Engineer , you will work with Chip Architects to validate ... smarter, connected future for all. As a Qualcomm Design Verification Hardware Engineer , you will plan, design,...Science, Engineering, or related field and 4+ years of ASIC design, verification , validation, integration, or related… more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification . The NVIDIA Clocks ... reset logic to various units in SOC and GPU ASIC . The complexity of the clocks and resets design...industry-standard verification flows like SV constraint random verification , UVM, Formal Verification , Coverage… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position ... silicon correlation. + Own the unit and sub-system level verification of various IPs, create functional test plans, and...as VCS-XA or equivalent tools, Gate Level Simulation or Formal Equivalence domains. + Proficiency in scripting language, such… more
- Amazon (Austin, TX)
- …in the validation of ASIC implementations in Verilog/SystemVerilog . Run formal verification of complex blocks to ensure functional correctness . Work ... Matlab model : development or DV integration experience - Familiarity with formal verification techniques - Strong written and verbal skills Amazon is an equal… more
- Qualcomm (San Diego, CA)
- …power, high performance ASIC /SoC design flows (micro-architecture, RTL design, verification , synthesis, timing/STA, UPF, CLP, LEC formal verification , ... compute, AI and XR space. An ideal candidate will oversee definition, design, verification , and documentation for ASIC development for a variety of products.… more
- Amazon (Austin, TX)
- …digital verification , preferably in areas of image processing. - Familiarity with formal verification techniques - Lab debug experience and/or FPGA debug - ... highly differentiated silicon into Blink and Ring battery powered devices. Our verification team works on state-of-the art SoCs in a vertically integrated team… more
- Palo Alto Networks (Santa Clara, CA)
- …silicon validation and lab bring-up experience **.** **Preferred / Nice-to-Have** + Formal verification ownership and expertise. + Experience with innovation or ... we all win with precision. **Your Career** Join our ASIC team and help deliver the digital logic that...powers our next-generation firewall platforms. As a Senior Principal Engineer , you will take end-to-end ownership of complex modules… more
- Amazon (Sunnyvale, CA)
- … development in a production setting - Experience with UVM - Familiarity with formal verification techniques - Familiarity with the TCL programming language - ... Astro personal robot. What will you help us create? As an ASIC Methodology / CAD engineer you will create and maintain automated design flows that improve the… more
- Northrop Grumman (Dulles, VA)
- …are not only part of history, they're making history. We have openings for a **FPGA/ ASIC Engineer ** to join our team of qualified, diverse individuals in the ... join the Electrical Engineering Avionics department that specializes in FPGA/ ASIC for space applications. _This is a dual level...analyzers. + Generation of Test Benches and support of formal VHDL Verification The Northrop Grumman Tactical… more
- Meta (Sunnyvale, CA)
- …Estimation at RTL and Gate Level and identify power reduction opportunities. 4. Run Formal Verification checks between RTL and Gate level netlist and debug the ... on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical… more
- Broadcom (San Jose, CA)
- …* Synthesis using Synopsys tool suite * Timing Analysis using Synopsys Primetime tool * Formal Verification * DFT concepts of Scan, BIST. * Strong Perl and Tcl ... challenged and gain valuable experience towards enhancing a successful career in ASIC design. You will involve in engineering implementation spec writing from… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for an ASIC Design Engineer to join our Global Circuits Team! In this position, you'll make a real impact in a dynamic, technology-focused ... and the latest process technologies. + Work on functional verification , perform CDC checks and formal equivalence....ASIC design flow including front end design and verification , DFT, timing analysis, ECO, ATE test development, post-si… more
- Amazon (San Diego, CA)
- …Familiarity with UVM and Matlab. . Ability to write assertions and exposure to Formal verification Amazon is an equal opportunity employer and does not ... work at Amazon! We're hiring a Sr. Modem Design Engineer within a high performance ASIC design...solutions, and meeting the power objectives . Create standalone verification test bench to verify the correctness of your… more
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