- Ayar Labs (San Jose, CA)
- Engineer - ASIC Design Verification Location: San Jose (this is an on-site position) Summary: This role is responsible for pre-Si verification and ... BS, MS in Electrical Engineering, Computer Engineering or equivalent Knowledge of ASIC verification experience System Verilog, UVM testbench development for… more
- Meta (Boston, MA)
- **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide… more
- Lockheed Martin (Denver, CO)
- **Description:** Join Our Team as an ** ASIC & FPGA Lead Verification Engineer ** where you will support over 50 different programs and research and ... world, and are seeking a highly talented and motivated ** ASIC & FPGA Verification Engineer **...test pattern generation, logic equivalency checking, linting and/or other formal design checks\. * Knowledge of space\-grade/qualified FPGAs and… more
- Meta (Raleigh, NC)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities:...or more of the following areas along with functional verification - SV Assertions, Formal , Emulation 14.… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification . The NVIDIA Clocks ... reset logic to various units in SOC and GPU ASIC . The complexity of the clocks and resets design...industry-standard verification flows like SV constraint random verification , UVM, Formal Verification , Coverage… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position ... silicon correlation. + Own the unit and sub-system level verification of various IPs, create functional test plans, and...as VCS-XA or equivalent tools, Gate Level Simulation or Formal Equivalence domains. + Proficiency in scripting language, such… more
- Amazon (San Diego, CA)
- …in the validation of FPGAs using test benches, which can be reused for the ASIC implementation . Run formal verification of complex blocks to ensure ... of experience in emulation - Familiarity with Matlab - Familiarity with formal verification techniques - Strong written and verbal skills Amazon is an equal… more
- Cisco (Maynard, MA)
- …back to a company culture that empowers an inclusive future for all. **Your Impact** The ASIC Design Verification Co-Op Engineer will be a member of a team ... a full-time graduate program + Knowledge of the latest ASIC verification methodologies,toolsand scripting/programming languages + Knowledge… more
- NVIDIA (Santa Clara, CA)
- …in low-power and high-performance design optimization techniques. + Familiarity with formal verification tools (eg, Formality/Conformal LEC) and methodologies. ... generation CMOS technology. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic...across multiple design blocks + Work with DFT and Verification teams to ensure functional and timing correctness What… more
- Broadcom (San Jose, CA)
- …* Synthesis using Synopsys tool suite * Timing Analysis using Synopsys Primetime tool * Formal Verification * DFT concepts of Scan, BIST. * Strong Perl and Tcl ... challenged and gain valuable experience towards enhancing a successful career in ASIC design. You will involve in engineering implementation spec writing from… more
- Amazon (Sunnyvale, CA)
- …digital verification , preferably in areas of image processing. - Familiarity with formal verification techniques - Lab debug experience and/or FPGA debug - ... highly differentiated silicon into Blink and Ring battery powered devices. Our verification team works on state-of-the art SoCs in a vertically integrated team… more
- Meta (Charleston, WV)
- …as machine learning, video transcoding and network acceleration. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...Peripheral Subsystems 9. Experience with Synthesis, Timing Closure and Formal Verification Methodology 10. Master's or PhD… more
- Meta (Sunnyvale, CA)
- …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...Peripheral Subsystems 13. Experience with Synthesis, Timing Closure and Formal Verification Methodology 14. Master's or PhD… more
- Amazon (North Reading, MA)
- …Communications Engineering -10+ years of experience in digital design -Exposure to Formal verification -Experience with physical implementation flows Amazon is ... time to revenue. Innovators will be delighted with our integrated verification /validation environment that is used to perform architectural modeling to post-silicon… more
- Amazon (Austin, TX)
- …Familiarity with UVM and Matlab. . Ability to write assertions and exposure to Formal verification Amazon is an equal opportunity employer and does not ... work at Amazon! We're hiring a Sr. Modem Design Engineer within a high performance ASIC design...solutions, and meeting the power objectives . Create standalone verification test bench to verify the correctness of your… more
- Cisco (San Jose, CA)
- …Cadence) + Experience with Spyglass CDC and glitch analysis + Experience using Formal Verification : Synopsys Formality and Cadence LEC. + Experience with ... ASIC Design Technical Leader - Design & Timing...customer shipments **Your Impact** You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding… more
- Amazon (San Diego, CA)
- …methodology - Develop, regress and deploy digital implementation flows including Synthesis and Formal Verification - Enable digital design teams to meet PPA ... Come work at Amazon! The Role: As Senior CAD Engineer you will be responsible for installing and maintaining...and debugging techniques - Familiar with basic Synthesis and Formal Verification methodology and flow development experience… more
- Amazon (Sunnyvale, CA)
- …-Master's or Ph.D degree in Electrical / Communications Engineering -Exposure to Formal verification -Experience with physical implementation flows Amazon is an ... time to revenue. Innovators will be delighted with our integrated verification /validation environment that is used to perform architectural modeling to post-silicon… more
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