• Senior ASIC Power Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Power Engineer ! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on ... are expected to understand the design and implementation, develop power metrics and drive power reductions +...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more
    NVIDIA (04/23/25)
    - Save Job - Related Jobs - Block Source
  • Senior ASIC Power Integrity…

    NVIDIA (Westford, MA)
    …to amplify human inventiveness and intelligence. NVIDIA is seeking an outstanding Senior ASIC Power Integrity Engineer who is dedicated to collaborating ... significant impact! What you'll be doing: + Ensuring robust power integrity in physical design to optimize power... power integrity in physical design to optimize power delivery. + Design and optimize physical design solutions… more
    NVIDIA (05/21/25)
    - Save Job - Related Jobs - Block Source
  • Low Power ASIC Engineer - New…

    NVIDIA (Santa Clara, CA)
    …we can make a lasting impact on the world! We are now looking for an Low Power Design/Verification ASIC Engineer - New College Grad 2025. We continue to ... a wide range of sectors. Come join NVIDIAs Low Power DV team to develop state of the art...team to develop state of the art GPUs to power AI, Automotive, GeForce, and Mobile products. What you'll… more
    NVIDIA (06/03/25)
    - Save Job - Related Jobs - Block Source
  • Low Power ASIC Engineer

    Qualcomm (San Diego, CA)
    … engineers with excellent analytical and technical skills, and a focus on low power , high performance ASIC designs, and, ability to execute critical power ... low power designs. + Strong knowledge in the entire low power , high performance ASIC /SoC design flows (micro-architecture, RTL design, verification,… more
    Qualcomm (05/17/25)
    - Save Job - Related Jobs - Block Source
  • ASIC Package Signal/ Power Integrity…

    Cisco (San Jose, CA)
    …boundaries on power , speed, and fabrication / assembly technology. You will drive ASIC package power and signal integrity rules and layout analysis to enable ... 90% of IP traffic. We are a highly specialized ASIC team with experts in all aspects of advanced...team is looking for an expert in Signal and Power Integrity to help us develop our next generation… more
    Cisco (04/02/25)
    - Save Job - Related Jobs - Block Source
  • ASIC /FPGA Design and Verification…

    The Boeing Company (Tukwila, WA)
    …Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for an ** ASIC and/or FPGA Design and Verification Engineer ** (Experienced, Lead or ... Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Engineer on the Boeing Electronic Products...determine the optimal parts, weighing Schedule, Cost, Risk, Area, Power (SCRAP) vs. performance + Implement FPGA/ ASIC more
    The Boeing Company (06/04/25)
    - Save Job - Related Jobs - Block Source
  • ASIC and/or FPGA Design & Verification…

    The Boeing Company (Huntington Beach, CA)
    …Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Engineer on the Boeing Electronic Products team you will develop ... determine the optimal parts, weighing Schedule, Cost, Risk, Area, Power (SCRAP) vs. performance + Implement FPGA/ ASIC ...Area, Power (SCRAP) vs. performance + Implement FPGA/ ASIC with latest design practices and tools from block-level… more
    The Boeing Company (06/04/25)
    - Save Job - Related Jobs - Block Source
  • FPGA/ ASIC Design Engineer (Silicon…

    SpaceX (Redmond, WA)
    FPGA/ ASIC Design Engineer (Silicon Engineering) Redmond, WA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... the ultimate goal of enabling human life on Mars. FPGA/ ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX...integrate design blocks using Verilog/SystemVerilog + Optimize designs for power , performance and area + Participate in the design… more
    SpaceX (06/12/25)
    - Save Job - Related Jobs - Block Source
  • Sr. SOC/ ASIC Physical Design…

    SpaceX (Sunnyvale, CA)
    Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
    SpaceX (04/15/25)
    - Save Job - Related Jobs - Block Source
  • Sr. SOC/ ASIC Physical Design…

    SpaceX (Bastrop, TX)
    Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out exploring ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
    SpaceX (04/15/25)
    - Save Job - Related Jobs - Block Source
  • Sr. ASIC Design Engineer (Silicon…

    SpaceX (Irvine, CA)
    Sr. ASIC Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX...to solve complex problems including clock domain crossings and power optimization + ASIC /SoC system integration experience… more
    SpaceX (06/12/25)
    - Save Job - Related Jobs - Block Source
  • Next-Gen, High-Speed Memory Subsystem ASIC

    Qualcomm (San Diego, CA)
    …Controller and Advanced Memory NoCs based Subsystem Design Team is looking for ASIC Design Engineers for the next generation high speed LPDDR/DDR memory subsystems.. ... such as CPU, GPU, DSP, Multimedia Processors and the engineer is expected to be responsible for enabling high...Synthesis, Timing Closure, Physical Design Support, Gate Level Simulations, Power Analysis are expected to be key tasks. You… more
    Qualcomm (05/20/25)
    - Save Job - Related Jobs - Block Source
  • ASIC Floorplan Design Engineer - New…

    NVIDIA (Santa Clara, CA)
    We are now looking for a ASIC Floorplan Design Engineer - NCG. NVIDIA is seeking a talented ASIC Floorplan Engineer to design and implement the world's ... chip development. + Drive the area review process and collaborate with the ASIC design team to identify area, interconnect and floorplan improvement opportunities +… more
    NVIDIA (05/21/25)
    - Save Job - Related Jobs - Block Source
  • Digital ASIC Design Engineer

    Qualcomm (San Diego, CA)
    …**General Summary:** Qualcomm mixed-signal IP design team is seeking talented senior ASIC digital designers to join our efforts in developing the next generation ... - Apply computer architecture and optimization techniques for improving power , performance, and area of the IPs - Assist...- Assist in running the full suite of front-end ASIC design tools (lint checking, CDC, DFT, synthesis, FV,… more
    Qualcomm (04/19/25)
    - Save Job - Related Jobs - Block Source
  • ASIC Engineer , Architecture

    Meta (Austin, TX)
    **Summary:** Meta is seeking an ASIC Engineer , Architecture to join our Infrastructure organization. Our servers and data centers are the foundation upon which ... our expert engineers to build "Green" data center accelerators. **Required Skills:** ASIC Engineer , Architecture Responsibilities: 1. Work on advanced ASIC more
    Meta (04/18/25)
    - Save Job - Related Jobs - Block Source
  • Sr Principal ASIC Design Engineer

    Palo Alto Networks (Santa Clara, CA)
    …- just to name a few! At Palo Alto Networks, we believe in the power of collaboration and value in-person interactions. This is why our employees generally work full ... we all win with precision. **Your Career** Join our ASIC team and help deliver the digital logic that...powers our next-generation firewall platforms. As a Senior Principal Engineer , you will take end-to-end ownership of complex modules… more
    Palo Alto Networks (06/06/25)
    - Save Job - Related Jobs - Block Source
  • ASIC Rtl Design Engineer

    Google (Sunnyvale, CA)
    …+ Experience with industry-standard EDA tools for simulation, synthesis, and power analysis. Preferred qualifications: + Master's degree or PhD in Electrical ... related field. + 5 years of experience in Application-specific integrated circuit ( ASIC ) design. + Experience working on interconnects and network subsystems. Be… more
    Google (05/06/25)
    - Save Job - Related Jobs - Block Source
  • ASIC Engineer , Formal Verification

    Meta (Lincoln, NE)
    …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide technical ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the...clock domain crossing, IP-XACT based register verification and low power 21. Experience with development of fully automated flows… more
    Meta (03/22/25)
    - Save Job - Related Jobs - Block Source
  • ASIC Implementation Engineer

    Meta (Sunnyvale, CA)
    …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical ... **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure organization. We...and generate optimized Gate Level Netlist for Timing, Area, Power . 2. Debug the timing/area/congestion issues and work with… more
    Meta (06/06/25)
    - Save Job - Related Jobs - Block Source
  • ASIC Design Verification Engineer

    Qualcomm (Santa Clara, CA)
    …of the position involves comprehensive pre-silicon test planning for digital power IP's, its testbench development using the advanced verification methodology such ... model development and formal verification (property checking). Learn and deploy power -aware UPF verification flow and methodology. Involve in developing automation… more
    Qualcomm (04/09/25)
    - Save Job - Related Jobs - Block Source