- Google (Sunnyvale, CA)
- …focus on TPU architecture and its integration within AI/ML-driven systems. As a Silicon Design Manager for Tensor Processing Unit (TPU) Compute, you will develop ... more
- Broadcom (Fort Collins, CO)
- …function and integrates the analog functions required to realize the IP . This manager will work closely with the physical design team that builds the ... more
- Cisco (San Jose, CA)
- ASIC Design Technical Leader - Design &...timing modes. + Option to also do block level RTL design or block or top-level IP integration. + Helping ... more
- L3Harris (Camden, NJ)
- …air, land, sea and cyber domains in the interest of national security. Job Title: ASIC /FPGA Design : Senior Member of Engineering Staff (SMES) Job Code: 26283 Job ... more
- Lockheed Martin (Denver, CO)
- …& FPGA Associate Engineering Manager ** to lead and manage a team of ASIC /FPGA design and verification engineers in executing design services for programs ... more
- Cisco (San Jose, CA)
- ASIC Design Engineer - Design & Timing...timing modes + Option to also do block level RTL design or block or top-level IP integration + Helping ... more
- Teradyne (North Reading, MA)
- …Experience with contract negotiation, including technology services and intellectual property . + Specific understanding of ASIC development and manufacturing ... more
- Meta (Sunnyvale, CA)
- …technical sessions to track and follow up on issues. **Required Skills:** Silicon IP Technical Program Manager Responsibilities: 1. Serve as the primary point ... more
- Amazon (Sunnyvale, CA)
- …Blink and Ring camera products. Your team will be responsible for front-end digital design and verification of complex IP and SoC integration. This role provides ... more
- Global Foundries (Austin, TX)
- …+ Develop and execute strategy with ecosystem partners to enable the customer ASIC development through IP integration, design services, advanced packaging ... more
- Amazon (Sunnyvale, CA)
- …ensuring Amazon's access to leading-edge manufacturing capabilities - Collaborate with silicon design teams to optimize die size, IP selection, and package ... more
- Broadcom (San Jose, CA)
- …**Job Description:** Broadcom's ASIC Product Division is seeking candidates for a DFT Manager position at our San Jose Design Center. As a DFT Manager ... more
- quadric.io, Inc (Burlingame, CA)
- …in compiler strategies for data parallel processors such as GPUs, DSPs and ASIC design flows * Knowledge of end-to-end toolchain, including compilers, linkers ... more
- Arrow Electronics (San Jose, CA)
- …timing** in multiple timing modes. + Option to also do block level RTL design or block or top-level IP integration. + Helping develop efficient methodology ... more