• Processor RTL Design Engineer (Multiple…

    Qualcomm (San Diego, CA)
    …processor, Verilog, System Verilog, logic design , digital design , processor integration, bus interface, cache . **Minimum Qualifications:** * Bachelor's ... Area:** Engineering Group, Engineering Group > DSP Architecture and Design **General Summary:** A variety of high performance, low...micro-architecture for various blocks of Hexagon DSP core and sub - system + Develop RTL for multiple logic… more
    Qualcomm (07/17/25)
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  • Principal Design Engineer

    Microsoft Corporation (Mountain View, CA)
    design including microarchitecture specification development, RTL coding in Verilog/ System Verilog or similar, PPA optimization, and design verification ... + System software/firmware/hardware interactions and optimization + Experience in Sub - system and SoC integration Silicon Engineering IC5 - The typical… more
    Microsoft Corporation (07/25/25)
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  • Sr. Coherent Interconnect Micro-architect/Logic…

    Samsung Electronics Co., Ltd. (Austin, TX)
    …ACE or AXI coherent interconnect and bus protocols + Knowledge of memory subsystem design including coherent cache design . + Strong communication and ... In this role you will be interacting with the system architects, verification, performance/power and design implementation...Knowledge of memory controller and either coherent interconnect or cache design . + Knowledge of memory subsystem,… more
    Samsung Electronics Co., Ltd. (07/05/25)
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  • Sr SOC Verification Engineer, Annapurna ML

    Amazon (Cupertino, CA)
    …Experience verifying multiple levels of design including: custom blocks, IP blocks, sub - systems , and fullchip SOC system testing. - Experience using ... EE or CS or CE. - 8+ years of design verification experience using System Verilog and...for eg PCIe and UCIe - Experience with memory sub - systems , including cache coherency and… more
    Amazon (06/11/25)
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  • LLVM Compiler Engineer

    Qualcomm (Santa Clara, CA)
    …and implements software sub - systems for complex, large-scale products and systems . * Leads design , coding, and testing efforts to ensure that projects ... cache , memory organization, etc. + Working knowledge of system software tools such as assemblers, linkers, debuggers and...Systems , and Test engineers) to increase leverage and design solutions that work with other components of a… more
    Qualcomm (07/12/25)
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  • Sr. CPU Architect, Project Kuiper

    Amazon (San Diego, CA)
    …or granted asylum. A day in the life Be part of Project Kuiper's sub -team responsible for defining and implementing the digital chip SOCs for communications via Low ... few legacy constraints. The team works with customer requirements and wireless system teams to define modems, high-speed interfaces, embedded processors, and DSP… more
    Amazon (07/23/25)
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  • Software Engineer II

    Bank of America (Charlotte, NC)
    …for building responsive and dynamic front-end applications. + Knowledge of distributed systems and event-driven architectures using Apache Kafka, Pub/ Sub or ... ensuring the solution can be integrated successfully into the overall application/ system with clear, robust, and well-tested interfaces. Job expectations include an… more
    Bank of America (08/01/25)
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  • Principal Software Engineer

    Zscaler (San Jose, CA)
    …distributed architectures to address challenges such as configuration distribution, cache invalidation, and system -wide consistency + Hands-on experience ... CA office 3 days a week. You will: + Design , develop, and maintain scalable cloud-based enterprise applications in...with real-time analytics using pub/ sub platforms (eg, Kafka, Pub/ Sub , Pulsar), distributed… more
    Zscaler (07/08/25)
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