- Raytheon (Phoenix, AZ)
- …lifecycle support of Raytheon products.REBEP has an opportunity for an Electrical Engineer who is seeking to use their strong academic background and professional ... Transmitter subsystems. The successful candidate to fill this Senior Hardware Design Engineer role will employ their working knowledge of Circuit Card Assemblies and… more
- Raytheon (Tucson, AZ)
- …card assembly design and fabricationTesting or designing RF hybrid ( chip and wire) technologiesHigh speed data converter test/characterizationHigh power RF ... design or test experienceScripting experience (Matlab or Python)Some front line leadership desirableWhat We OfferOur values drive our actions, behaviors, and performance with a vision for a safer, more connected world. At RTX we value: Trust, Respect,… more
- CACI International (Fort Meade, MD)
- Systems Engineer (VHDL Chip ) Job Category: Engineering Time Type: Full time Minimum Clearance Required to Start: TS/SCI with Polygraph Employee Type: Regular ... Systems Engineers (SE) with knowledge of VHSIC Hardware Description Language (VHDL) Chip Development in/around the Fort Meade, Maryland area. You'll use your Systems… more
- NVIDIA (Santa Clara, CA)
- …fueled by phenomenal technology-and outstanding people! As part of Nvidia's applied LLM chip design team, you will have the opportunity to tap into the unlimited ... potential of AI and change the landscape of chip design at Nvidia and throughout the industry. Our...working for us. Are you a creative and autonomous engineer who loves a challenge? Come join our applied… more
- Broadcom (San Jose, CA)
- …testplans for verifications of RTL and gatesim-based designs at both the block and chip level. The engineer will also be tasked with creating ATE testing ... a Candidate Account, please Sign-In before you apply.** **Job Description:** Engineer will be responsible for verification of complex switch designs.… more
- Amazon (Cupertino, CA)
- …not limited to compiler engineer , machine learning engineer , runtime engineer , performance engineer and ML chip accelerator, ASIC, physical designs, ... hire for in the United States. Are you excited about Machine Learning, chip acceleration, compilers, storage, systems or EC2? Are you passionate about delivering… more
- Amazon (Cupertino, CA)
- …not limited to complier engineer , machine learning engineer , runtime engineer , performance engineer and ML chip accelerator, ASIC, physical designs, ... Description Are you excited about Machine Learning, chip acceleration, compilers, storage, systems or EC2? Are you passionate about delivering high quality services… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …R&D and Customer Engagement teams to influence the development of software tools for advanced chip design platforms. As Product Engineer , you will be a source of ... world of technology. This opportunity is for a Product Engineer in the Digital and Signoff Group (DSG) at...and to R&D. You are a motivated and energetic engineer with a deep understanding of ASIC design methodologies… more
- Google (Sunnyvale, CA)
- …delivering unparalleled performance, efficiency, and integration. As a Signal Integrity/Power Integrity Engineer , you will lead chip and package design, ensuring ... Integrity (SI/PI) analysis and design for high-speed digital systems, including chip -package co-design concepts. + Experience with SIPI or microwave modeling tool… more
- Capgemini (CA)
- …our business with semiconductor clients through comprehensive solutions in chip design, software, hardware, supply chain, and sustainability. **Key ... their journey towards Intelligent Industry. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries across sectors… more
- Google (Sunnyvale, CA)
- …architecture and its integration within AI/ML-driven systems. As a Custom Datapath Physical Design Engineer on the Chip Implementation team, you will work on the ... implementation of ASICs in advanced technology nodes. You will use your expertise in custom design and custom design tools to improve the efficiency of the next generation of our chips, unlocking design efficiency that is not attainable with traditional… more
- Broadcom (San Jose, CA)
- …you apply.** **Job Description:** Broadcom is seeking an experienced package design engineer for complex flip- chip -BGA packages for industry-leading ASICs with ... track your work across 2+ projects simultaneously . General flip- chip BGA package design & engineering . Project management...BSEE or similar field and 8+ years' experience in flip- chip -BGA package design, including high-speed SerDes or MSEE or… more
- Qualcomm (San Diego, CA)
- …be working closely with cross-functional teams such as IC Design, Systems Engineering for chip /circuit bring up and debug. Engineer will be working with Customer ... that develops test solutions for highly integrated SOCs ( System on Chip ) designed by Qualcomm. Main responsibilities includes defining and executing the development… more
- Qualcomm (Santa Clara, CA)
- …**Preferred qualifications** * MS or PhD degree in Engineering * Experience as an engineer in chip development and integration into hardware or software systems. ... Experience with silicon development methodologies, leading tape-outs and silicon validation. * A successful candidate requires a strong IP core (preferably CPU) design & debug background including Project Management of IP team working on multiple programs. *… more
- Northrop Grumman (Baltimore, MD)
- …Mission Systems is seeking a **Principal / Senior Principal Electromechanical Design Engineer ** to join our team of qualified, diverse individuals. This position ... and production support of state-of-the-art RF, digital, and mixed signal multi- chip modules (MCMs), Printed Wiring Boards (PWBs), and Circuit Card Assemblies… more
- Northrop Grumman (Baltimore, MD)
- …Grumman Mission Systems is seeking a **Principal/Senior Principal Electromechanical Design Engineer ** to join our team of qualified, diverse individuals. This ... and production support of state-of-the-art RF, digital, and mixed signal multi- chip modules (MCMs), Printed Wiring Boards (PWBs), and Circuit Card Assemblies… more
- SpaceX (Irvine, CA)
- Sr. SOC/ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where ... human life on Mars. SR. SOC/ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building… more
- SpaceX (Irvine, CA)
- SOC/ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity ... enabling human life on Mars. SOC/ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building… more
- Meta (Austin, TX)
- …Lint, CDC analysis, timing constraints, synthesis to build efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC ... Implementation Engineer - Timing Responsibilities: 1. Develop Timing Constraints for...the various partition blocks. 3. Develop SOC Timing Full chip Flat & Hierarchical Constraints for Functional & DFT… more
- NVIDIA (Santa Clara, CA)
- …gaming consoles and self driving cars. Come join us in our mission to Engineer the next generation of best-in-class products. Our teams focus is on architecture and ... design of CMOS and Silicon-Photonics high-speed chip interfaces (NVLink, IEEE, PCIE, USB, OIF) and other...+ Participate in developing flow and tool methodologies for chip floorplan, waveguide routing, pcell deveploment, chip … more
