• Applied Materials (Cedar Park, TX)
    …global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service ... cutting-edge equipment that helps our customers manufacture display and semiconductor chips - the brains of devices we use every day. As the foundation of the global electronics industry, Applied enables the exciting technologies that literally connect our… more
    JobLookup XML (01/10/26)
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  • Design Engineer - Chip Floorplanner

    Broadcom (Fort Collins, CO)
    …exceeding 1 GHz, from concept through production. **Role Overview** This Floorplanning Engineer role focuses on chip -level physical architecture and integration ... for advanced ASICs in deep sub-micron technologies. The position provides hands-on experience with the latest 3 nm and smaller process nodes, defining and optimizing the overall die layout, including partitioning, hierarchy, and placement of major functional… more
    Broadcom (12/16/25)
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  • Chip Integration Engineer

    Broadcom (San Jose, CA)
    …candidate will be responsible for various key tasks in the areas of chip integration and RTL design of cutting-edge network switch/routing designs. The day-to-day ... 1). Defining in the microarchitecture and implementing design of chip top level modules for L2/L3 Network Switching and...ASICs and various subsystems within these chips. 2). Doing chip level integration and putting all the functional blocks,… more
    Broadcom (11/19/25)
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  • Chip Power Integrity Engineer

    Broadcom (Fort Collins, CO)
    …**Job Description:** **You will fit this role if:** + You are an expert in full- chip power integrity analysis using state of the art tools that are able to parallel ... level through PDN simulations **More specifically we are looking for a chip power integrity expert with the following hands-on know-how:** + Developed innovative… more
    Broadcom (11/06/25)
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  • Senior C++ Software Engineer - Chip

    NVIDIA (Santa Clara, CA)
    …and verification of architectural, rtl, and gate level designs. As a software engineer , you will craft highly efficient software to automate and facilitate chip ... Develop software tools in C++/Golang to analyze and construct chip designs described in C++, Verilog or domain-specific languages...+ Optimize the daily workflows of the world's top chip modelers and designers. What We Need to See:… more
    NVIDIA (01/10/26)
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  • Senior ASIC Verification Engineer

    NVIDIA (Santa Clara, CA)
    We are looking to hire a Chip Design Verification Engineer to join NVIDIA Chip Design group. The work environment is versatile, educational, dynamic and ... the world's most advanced AI data centers. We are seeking a senior verification engineer to help us ensure the quality and correctness of this critical technology.… more
    NVIDIA (01/10/26)
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  • Principal SoC Design Verification Engineer

    Global Foundries (Richardson, TX)
    …For more information, visit www.gf.com. Summary of Role: Seeking a Senior System-on- Chip Design Verification engineer to verify the High-Performance Data ... Processing Unit Chiplets and Automotive Microcontrollers . The candidate will be responsible for contributing to all phases of the verification life cycle, including reviewing specifications, developing testbench architecture, creating testplans , defining and… more
    Global Foundries (12/12/25)
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  • Lead RF/Analog Mixed Signal IC Design…

    Lockheed Martin (Moorestown, NJ)
    …to implement RF and Analog design blocks for implementation of novel Systems\-on\- Chip \(SOC\) functions\. \-The engineer will have the opportunity to ... **Description:** We are seeking an experienced RF/Analog/Mixed Signal \(AMS\) IC design engineer to join our Integrated Circuits Design team in Moorestown NJ\. The… more
    Lockheed Martin (01/09/26)
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  • Chip Architect

    Texas Instruments (Dallas, TX)
    We are seeking a talented ** Chip Architect** to join our ACS team which develops cutting edge ASSP ICs. This individual will play a key role in **architecting ... design, layout, verification, and test/validation teams to define the chip architecture to meet all project requirements. + Own...ensure smooth integration according to plan. **Why TI?** + Engineer your future. We empower our employees to truly… more
    Texas Instruments (11/07/25)
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  • Signal and Power Integrity Engineer , PhD,…

    Google (Sunnyvale, CA)
    …and its integration within AI/ML-driven systems. As a Signal Integrity/Power Integrity Engineer , you will lead chip and package design, ensuring optimal ... Signal and Power Integrity Engineer , PhD, University Graduate _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving… more
    Google (12/16/25)
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  • CPU Design Methodology Engineer

    NVIDIA (Hillsboro, OR)
    We are now looking for a CPU Design Methodology Engineer ! The complexity of chip development has greatly increased over the years. We are now packing tens of ... billions of transistors in a chip to meet the growing computing demand in a...NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, RTL… more
    NVIDIA (01/10/26)
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  • Package Design Engineer

    Broadcom (San Jose, CA)
    …apply.** **Job Description:** Broadcom is seeking an experienced IC package-design engineer for complex flip- chip -BGA packages for industry-leading ASICs with ... prioritize, & track your work across 2+ projects simultaneously + General flip- chip BGA package design & engineering + Project management and customer interface… more
    Broadcom (12/02/25)
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  • Princ Engineer Design Enablement Testsite

    Global Foundries (Malta, NY)
    …Sofia. Summary of Role: Design, develop, and utilize testsites which are in-house chip designs used to develop and understand the technology of interest. Typically ... directed and/or independently), or as a manager:* Perform in-house chip development to aid in understanding the customers design...in understanding the customers design / technology * Design chip elements to get electrical data out of the… more
    Global Foundries (12/20/25)
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  • Package Design Engineer

    Google (Sunnyvale, CA)
    Package Design Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and mentoring more junior team ... related field, or equivalent practical experience. + 4 years of experience in chip package substrate design using Cadence APD (Allegro Package Designer) or mentor… more
    Google (12/20/25)
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  • Principal/Senior Principal Electromechanical…

    Northrop Grumman (Baltimore, MD)
    …Grumman Mission Systems is seeking a Principal/Senior Principal Electromechanical Design Engineer to join our team of qualified, diverse individuals. This position ... and production support of state-of-the-art RF, digital, and mixed signal multi- chip modules (MCMs), Printed Wiring Boards (PWBs), and Circuit Card Assemblies… more
    Northrop Grumman (12/24/25)
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  • SoC Silicon Top-Level Floorplan Engineer

    Google (Sunnyvale, CA)
    SoC Silicon Top-Level Floorplan Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Advanced** Experience owning outcomes and decision making, solving ... in physical design (eg, with a focus on floorplanning, integration, or top-level chip assembly). + Experience in physical design working on advanced nodes. +… more
    Google (12/20/25)
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  • AI Software Research Engineer

    IBM (Yorktown Heights, NY)
    **Introduction** **Your role and responsibilities** AI Software Research Engineer , IBM Corporation, Yorktown Heights, NY: * Improve and optimize the company's AIU ... Contribute to the PyTorch backend integration for the Spyre chip . * Contribute to hardware-software co-design, working with a...one (1) year of experience as an AI Software Engineer or related. One (1) year of experience must… more
    IBM (01/07/26)
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  • Principal/ Senior Principal Digital ASIC Circuit…

    Northrop Grumman (Jessup, MD)
    …new advantages to the warfighter. We are seeking a front-end ASIC design engineer for design and verification of full-custom digital circuits. Must be proficient in ... below:** **Basic Qualifications for Principal Digital ASIC Circuit Design Engineer Level:** + Bachelor's degree in a technical area...+ Current security clearance or eligibility + Experience with chip level integration and ASIC chip lead… more
    Northrop Grumman (12/05/25)
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  • Sr. SoC Power Engineer , Annapurna Labs…

    Amazon (Austin, TX)
    …AI workloads in datacenters all around the world. As a Sr. SoC Power Engineer , you'll contribute to the project at the ground level by modeling and estimating ... learning accelerators. We're searching for an experienced SoC Power engineer with a background in Power analysis with a...high accuracy. Key job responsibilities - Responsible for full chip power analysis & modelling at various stages of… more
    Amazon (12/17/25)
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  • Staff Semiconductor Process Engineer

    Lockheed Martin (Goleta, CA)
    **Description:** You will be a Focal Plane Array Process Engineer with our Infrared Sensors Business on site in Goleta, CA\. Our team is responsible for developing ... Arrays \(FPAs\), and we are looking for a talented engineer to join our team\. **What You Will Be...plasma system, substrate thinning, dicing, Anti\-Reflection \(AR\) coating, and flip\- chip bonding for hybridization, a key step in the… more
    Lockheed Martin (12/11/25)
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