- IBM (Rochester, MN)
- **Introduction** IBM Infrastructure has an opening for an entry level 1st Level Chip Packaging Development Engineer . As a member of this elite team of ... high-speed serial channel analysis, power domain analysis, and 1st level chip packaging integration methodologies that enable hardware in Quantum systems.… more
- NVIDIA (Belfast, ME)
- NVIDIA is looking for a Senior Verification Engineer to join our Networking Chip Design team in Belfast, focusing on products such as our ConnectX Ethernet ... (DPUs), which are revolutionising today's Data Centre. As a Senior Chip -Design Verification Engineer , you will join a group of passionate engineers to design… more
- NVIDIA (Austin, TX)
- …is our life's work, to amplify human inventiveness and intelligence. The NVIDIA System-On- Chip (SOC) group is looking for a top Senior ASIC Verification Engineer ... you'll be doing: + Design and maintain the Full Chip Verification environment. + Understand the architecture specifications and...scalable tests and checkers to verify the design at Full- chip level. + Launch regressions, resolve the issues, and… more
- Google (Mountain View, CA)
- …you'll have the opportunity to revolutionise AI by applying state-of-the-art AI to Chip Design. We develop research breakthroughs that impact all aspects of the ... develop and apply state-of-the-art AI methods and models to Chip Design and work closely with research and product...to set you up for success as a Research Engineer at Google DeepMind, we look for the following… more
- Google (Sunnyvale, CA)
- …provides the support and mentorship needed to learn and grow. Together we engineer and build the infrastructure, tools, access and telemetry for systems that enable ... orchestration of Google-scale services. Come build things that matter. The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services… more
- Qualcomm (San Diego, CA)
- …**General Summary:** Qualcomm has a position in San Diego, CA, focusing on on- chip power grid optimization for sub 2nm nodes. The role involves driving 3D ... power delivery. Ideal candidates should have a background in 2.5D/3D on- chip integration, process technology, and design enablement. Responsibilities include: +… more
- Meta (Sunnyvale, CA)
- …to mix and match the real and virtual worlds throughout the day. As an AMS Chip Application Engineer at Meta, you will work with a world-class group of engineers ... and cross-functional teamwork. **Required Skills:** Analog Mixed Signal Validation Engineer Responsibilities: 1. Collaborate with AMS/digital designers to develop… more
- Broadcom (San Jose, CA)
- …testplans for verifications of RTL and gatesim-based designs at both the block and chip level. The engineer will also be tasked with creating ATE testing ... a Candidate Account, please Sign-In before you apply.** **Job Description:** Engineer will be responsible for verification of complex switch designs.… more
- Amazon (Seattle, WA)
- …not limited to complier engineer , machine learning engineer , runtime engineer , performance engineer and ML chip accelerator, ASIC, physical designs, ... Description Are you excited about Machine Learning, chip acceleration, compilers, storage, systems or EC2? Are you passionate about delivering high quality services… more
- Capgemini (Santa Clara, CA)
- …that position Capgemini as a trusted partner across the semiconductor lifecycle-from chip design and embedded software to hardware, supply chain, and sustainability. ... 15 years of experience in semiconductor sales, including 6-8 years focused on chip design services and engineering-led solutions. + Proven track record of leading… more
- Google (Sunnyvale, CA)
- …delivering unparalleled performance, efficiency, and integration. As a Signal Integrity/Power Integrity Engineer , you will lead chip and package design, ensuring ... Integrity (SI/PI) analysis and design for high-speed digital systems, including chip -package co-design concepts. + Experience with SIPI or microwave modeling tool… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …team, product marketing team to influence the development of software tools for advanced chip design platforms. As Product Engineer , you will be a source of ... world of technology. This opportunity is for a Product Engineer in the Digital and Signoff Group (DSG) at...and to R&D. You are a motivated and energetic engineer with a deep understanding of ASIC design methodologies… more
- Google (Sunnyvale, CA)
- …within AI/ML-driven systems. As an Application-Specific Integrated Circuit (ASIC) Physical Design Engineer on the Chip Implementation team, you will work on ... the physical implementation of ASICs in advanced technology nodes. The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search,… more
- Google (Sunnyvale, CA)
- …architecture and its integration within AI/ML-driven systems. As a Custom Datapath Physical Design Engineer on the Chip Implementation team, you will work on the ... implementation of ASICs in advanced technology nodes. You will use your expertise in custom design and custom design tools to improve the efficiency of the next generation of our chips, unlocking design efficiency that is not attainable with traditional… more
- Broadcom (Fort Collins, CO)
- …you apply.** **Job Description:** Broadcom is seeking an experienced package design engineer for complex flip- chip -BGA packages for industry-leading ASICs with ... track your work across 2+ projects simultaneously . General flip- chip BGA package design & engineering . Project management...BSEE or similar field and 8+ years' experience in flip- chip -BGA package design, including high-speed SerDes or MSEE or… more
- Qualcomm (San Diego, CA)
- …be working closely with cross-functional teams such as IC Design, Systems Engineering for chip /circuit bring up and debug. Engineer will be working with Customer ... that develops test solutions for highly integrated SOCs ( System on Chip ) designed by Qualcomm. Main responsibilities includes defining and executing the development… more
- Safran (Everett, WA)
- …in design, engineering, quality, certification, and manufacturing for a variety of Blue Chip customers. The Senior Electrical Design Engineer is the technical ... Senior Electrical Design Engineer Company : Northwest Aerospace Technologies Job field...: More than 8 years Professional status : Professional, Engineer & Manager Salary range : USD $108,490 -… more
- Qualcomm (Santa Clara, CA)
- …**Preferred qualifications** * MS or PhD degree in Engineering * Experience as an engineer in chip development and integration into hardware or software systems. ... Experience with silicon development methodologies, leading tape-outs and silicon validation. * A successful candidate requires a strong IP core (preferably CPU) design & debug background including Project Management of IP team working on multiple programs. *… more
- Northrop Grumman (Baltimore, MD)
- …Grumman Mission Systems is seeking a Principal/Senior Principal Electromechanical Design Engineer to join our team of qualified, diverse individuals. This position ... and production support of state-of-the-art RF, digital, and mixed signal multi- chip modules (MCMs), Printed Wiring Boards (PWBs), and Circuit Card Assemblies… more
- Qualcomm (San Diego, CA)
- …team develops ML/AI or algorithmic based design tools which improve the overall chip design process and quality through NRE and/or AuC reduction or performance ... solve challenging problems. We work cross-functionally over the entire chip design process and are motivated by the chance...We are seeking a highly skilled Applied ML Research Engineer to research, develop, and deploy solutions to accelerate… more