- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer (s) - PPA Fusion Compiler to ... technology-focused company. What you will be doing: + Developing Efficient physical design methodologies for implementation of graphics processors and SOCs. + Key… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer (s) to join our outstanding Networking ... company. What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs....creative solutions to the state of the art physical design problems that are needed for NVIDIA chips. +… more
- Qualcomm (Austin, TX)
- …Group, Engineering Group > CPU Engineering **General Summary:** As a CPU Physical Design Methodology Engineer , you will work with implementation and ... flows. + Good data analytical skills to identify and root cause physical design issues. **Roles and Responsibilities** + Work with cross functional teams (RTL,… more
- Amazon (Cupertino, CA)
- …learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server ... Key job responsibilities - You will create and support innovative physical design methodology and CAD flows. - Develop cloud infrastructure to support physical … more
- Qualcomm (San Diego, CA)
- …Area:** Engineering Group, Engineering Group > ASICS Engineering **General Summary:** Qualcomm's Design Technology team is seeking a motivated engineer to drive ... development of advanced methodologies in die-level IR drop, STA, and power. The engineer should be proficient in static timing analysis using the Synopsys Primetime… more
- Qualcomm (San Diego, CA)
- …covering entire design cycle from RTL to GDS. Analyze how a new methodology will affect different phases of the design /verification cycle and work on fixing ... Engineering Group > ASICS Engineering **General Summary:** **Job Overview:** + Design adaptive power management controller, on-chip sensor controller and digital… more
- NVIDIA (Santa Clara, CA)
- …and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with emphasis on ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes + Develop flows for advanced place and route methods,… more
- quadric.io, Inc (Burlingame, CA)
- …What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing physical ... design methodologies and automation scripts for multiple design configurations across multiple process nodes. Responsibilities + Develop Quadric processor IP… more
- NVIDIA (Santa Clara, CA)
- We are part of the global circuits team at NVIDIA that design the state-of-the-art GPUs for all applications such as supercomputers, gaming consoles and self driving ... cars. Come join us in our mission to Engineer the next generation of best-in-class products. Our teams...best-in-class products. Our teams focus is on architecture and design of CMOS and Silicon-Photonics high-speed chip interfaces (NVLink,… more
- NVIDIA (Santa Clara, CA)
- …are now looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement hardware and software ... with many other teams at NVIDIA. + Work closely with software, architecture, design , verification, and silicon validation teams. + Train and mentor junior engineers… more
- NVIDIA (Santa Clara, CA)
- We are now looking for an ASIC Design Efficiency Engineer ! NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and ... extend the state of the art performance and efficiency. + Understand the design and implementation, develop methodology and infrastructure to drive Performance,… more
- Meta (Austin, TX)
- …ASIC Methodology Engineers within our Infrastructure organization to work on design integrity and signoff methodology development. We are looking for ... and IP for data center applications. **Required Skills:** ASIC Engineer , Methodology Responsibilities: 1. Work with our...and Foundries to assess signoff margins and tradeoffs at design /arch/process-tech levels and drive PPA and design … more
- NVIDIA (Santa Clara, CA)
- …can make a lasting impact on the world. We are looking for a motivated CAD Methodology Engineer to join our dynamic and growing team. If you like solving ... then join us today! Be part of a diverse team creating NVIDIA's chip design methodology ! We're responsible for the RTL CDC and RDC methodology for all… more
- Qualcomm (San Diego, CA)
- …which are setting benchmarks in the whole industry. As an SOC Verification and Methodology Engineer , you will be responsible for ensuring the quality and ... resolve design issues. In this role of Design Verification Engineer , you will be using...verification skills & experience with assertion & coverage-based verification methodology + Experience in handling verification from Test planning… more
- Qualcomm (San Diego, CA)
- …which are setting benchmarks in the whole industry. As an SOC Verification and Methodology Engineer , you will be responsible for ensuring the quality and ... resolve design issues. In this role of Design Verification Engineer , you will be using...verification skills & experience with assertion & coverage-based verification methodology + Knowledge of SOC architecture, CPU architecture (ARM… more
- NVIDIA (Santa Clara, CA)
- …intelligence. We are seeking an innovative senior timing signoff and constraint methodology engineer to develop pioneering timing sign-off strategies for ... next-generation GPUs and SoCs. In this role, you'll develop methodology and flows to validate timing constraints from RTL...about the challenges of designing most complex deep sub-micron design (3nm and beyond) who thrives on pushing the… more
- NVIDIA (Santa Clara, CA)
- …and intelligence. We are seeking an innovative senior timing and VF Methodology engineer to develop pioneering timing sign-off strategies for next-generation ... for someone passionate about the challenges of deep sub-micron design (3nm and beyond) who thrives on pushing the...multiple projects covering CPUs and GPUs + Collaborate with methodology leads, and timing engineers to refine silicon V-F… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are seeking a highly skilled Timing Methodology Engineer with expertise in asynchronous timing and I/O interface ... validating IO timing integrity, and enabling scalable STA methodologies across design hierarchies and technology nodes. We're looking for someone passionate about… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior CPU Implementation Methodology Engineer to join our VLSI team! If you are looking for a challenging and exciting role and you are a ... You will be responsible for all aspects of front-end design implementation methodologies (synthesis, formal-equivalence-checking), flow automation and application… more