• Formal Verification Engineer

    NVIDIA (Santa Clara, CA)
    We are now seeking a Formal Verification Engineer , focusing on the firmware verification ! In this role, you will be instrumental in ensuring the ... hardware-firmware co- verification challenges at scale. As a Formal Verification Engineer , your primary...causes of design/firmware flaws. + Research, evaluate, and integrate new formal verification methodologies, tools,… more
    NVIDIA (01/10/26)
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  • Sr. Formal Verification

    Amazon (Cupertino, CA)
    …to deliver high performance at low cost. Key job responsibilities - Develop formal verification plans, implement and verify state-of-the-art IP architectures. - ... & Career Growth Our team is dedicated to supporting new members. We have a broad mix of experience...related field - 7+ years of practical experience with formal verification as IP/Block owner, or equivalent… more
    Amazon (10/31/25)
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  • Senior Design Verification Engineer

    Microsoft Corporation (Austin, TX)
    …to customers and partners worldwide and we are looking for a **Senior Design Verification Engineer ** to help achieve that mission. As Microsoft's cloud business ... cloud hardware. We are looking for a **Senior Design Verification Engineer ** with a passion for customer...Perl. + Hands-on experience in Formal property verification , formal verification of computational… more
    Microsoft Corporation (01/06/26)
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  • ASIC/FPGA Principal Verification

    Lockheed Martin (Highlands Ranch, CO)
    **Description:** Join Our Team as a **ASIC/FPGA Verification Engineer ** where you will work on the development of a sophisticated state\-of\-the\-art avionics ... at Lockheed Martin Space's Silicon Solutions team and seeking a future\-looking Principal Verification Engineer who is able to case and realize a compelling… more
    Lockheed Martin (12/06/25)
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  • ASIC Verification Engineer - Acacia…

    Cisco (Maynard, MA)
    …Experience with C++ templates . Lab silicon validation experience . Experience with Formal Verification methodologies and tools such as Jasper or VCFormal **Why ... inclusive future for all. **Your Impact** The ASIC Design Verification Technical Lead Engineer will be working...to $212,900.00 and reflects the projected salary range for new hires in this position in US and/or Canada… more
    Cisco (12/20/25)
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  • Senior Design Verification Engineer

    Microsoft Corporation (Mountain View, CA)
    …related to Microsoft cloud hardware. We are looking for a Senior Design Verification Engineer for customer focused solutions, insight and industry knowledge to ... Cloud infrastructure. We are looking for a Senior Design Verification Engineer to join the team. **Responsibilities**...Working knowledge of writing assertions, coverage and / or formal verification . + Knowledge of industry standard… more
    Microsoft Corporation (01/09/26)
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  • Principal ASIC Design Verification

    Palo Alto Networks (Santa Clara, CA)
    …and the kind of precision that drives great outcomes. **Your Career** As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in ... and debug. You will work on diverse platforms including simulation, emulation, formal verification , and silicon validation. We expect office-based employees to… more
    Palo Alto Networks (12/10/25)
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  • ASIC Design Verification Engineer

    Cisco (Maynard, MA)
    …modulation techniques such as QAM + Lab silicon validation experience + Knowledge of Formal Verification methodologies and tools such as Jasper + Ability to work ... inclusive future for all. **Your Impact** The ASIC Design Verification Intern Engineer will be a member...for this position, by specific state, are listed below: New York City Metro Area: $44,000.00 - $185,000.00 Non-Metro… more
    Cisco (11/20/25)
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  • Senior Verification Engineer

    Microsoft Corporation (Raleigh, NC)
    …manage and optimize the Cloud infrastructure. We are looking for a **Senior Verification Engineer ** to join the team. **Responsibilities** + Establish yourself ... cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high...environments in industry standard languages like SVTB UVM or formal verification . + 3+ years of experience… more
    Microsoft Corporation (12/25/25)
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  • Principal Verification Engineer

    Microsoft Corporation (Raleigh, NC)
    …will manage and optimize the Cloud infrastructure. We are looking for a **Principal Verification Engineer ** to join the team. **Responsibilities** + Lead an SoC ... cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high...environments in industry standard languages like SVTB UVM or formal verification . + 2+ years of pre-silicon… more
    Microsoft Corporation (12/25/25)
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  • Design Verification Engineer

    Arrow Electronics (Mountain View, CA)
    **Position:** Design Verification Engineer **Job Description:** Principal Accountabilities * Responsible for architecting Verification Environment for ASIC ... functional and technical specification documents * Implement and maintain integrated end-to-end formal verification flow for the formal verification more
    Arrow Electronics (12/25/25)
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  • Design Verification Engineer

    Meta (Sunnyvale, CA)
    …from transistors, through architecture, firmware, and algorithms. **Required Skills:** Design Verification Engineer Responsibilities: 1. Define and implement ... vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips...test benches for block, IP, sub-system, and SoC level verification 2. Develop functional tests based on verification more
    Meta (12/20/25)
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  • Design Verification Engineer

    Meta (Sunnyvale, CA)
    …transistors, through architecture, firmware, and algorithms. **Required Skills:** Design Verification Engineer Responsibilities: 1. Define and implement IP/SoC ... vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips... verification plans, build verification test benches to enable IP/sub-system/SoC level … more
    Meta (12/20/25)
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  • Senior Circuit Verification Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a motivated Senior Circuit Verification Engineer to join our dynamic and growing team. Designing RAMs at leading edge process nodes ... of innovative circuits. + Support designer efforts in running formal verification , electronic rule checking, and other...products. + Engaging with industry tool AEs to qualify new tool releases, learn about new tool… more
    NVIDIA (12/09/25)
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  • Sr FPGA Engineer - Verification

    Medtronic (Lafayette, CO)
    … Verify FPGA systems and components using constrained random methodologies including UVM and Formal Verification Collect and refine FPGA and SOC verification ... in our technical functions to advance existing technology or introduce new technology and therapies. Formulates, delivers and/or manages projects assigned and… more
    Medtronic (01/09/26)
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  • ASIC Design Verification Engineer

    Cisco (San Jose, CA)
    …in a smaller ASIC team can provide. **Your Impact** As an ASIC Design Verification Engineer , you will play a critical role in developing Cisco's revolutionary ... and packet forwarding architectures highly desirable + Knowledge of formal verification tools (eg, Jasper or VC...to $193,400.00 and reflects the projected salary range for new hires in this position in US and/or Canada… more
    Cisco (01/10/26)
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  • Senior Verification Engineer

    Microsoft Corporation (Mountain View, CA)
    …will manage and optimize the Cloud infrastructure. We are looking for a **Senior Verification Engineer ** to join the team. **Responsibilities** The role will be ... cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high...with PCIe subsystems + Experience with the use of formal verification methods + Experience in RTL… more
    Microsoft Corporation (12/17/25)
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  • MLA IP Design Verification Engineer

    Amazon (Cupertino, CA)
    …Electrical or Communications Engineering or a related field - Experience with formal verification techniques including abstraction and end-to-end checking - ... around the world. We are seeking an experienced Design Verification Engineers to build the next generation of our...& Career Growth Our team is dedicated to supporting new members. We have a broad mix of experience… more
    Amazon (11/27/25)
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  • Principal/ Senior Principal Digital ASIC Circuit…

    Northrop Grumman (Jessup, MD)
    …generate manufacturing test plans. Must be knowledgeable in synthesis, SDC constraints, formal verification , and static timing. Knowledge of scan insertion and ... the warfighter. We are seeking a front-end ASIC design engineer for design and verification of full-custom...Verilog, System Verilog or VHDL RTL + Circuit synthesis, formal verification , and static timing using state-of-the-art… more
    Northrop Grumman (12/05/25)
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  • Test Engineer II

    Crane Aerospace & Electronics (Lynnwood, WA)
    …aspects of products for use in the Aerospace or Electronics marketplace. The Test Engineer II works on new product designs, modernization, and upgrades, as well ... and Electronics** has an exciting opportunity for a **Test Engineer II** at our **Lynnwood, WA** location. This is...to fly 5 billion miles from Earth on NASA's New Horizons spacecraft and innovative enough to be featured… more
    Crane Aerospace & Electronics (01/10/26)
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