- MIT Lincoln Laboratory (Lexington, MA)
- …development, the Laboratory has implemented vertically integrated in-house resources to facilitate design , lithographic mask layout , material growth and ... and laying out devices, test structures, systems, and full mask reticles based on input from device and process...in Perl, TCL, or Python o Experience with RF layout design At MIT Lincoln Laboratory, our… more
- Cubic Corporation (Durham, NC)
- … or MEMS processes. + Proficiency using Design Workshop 2000 or similar mask layout tool is required. + Proficiency in running/modifying custom GPE scripts ... via DRC. + Ensure the efficient operation of the mask design process. + Assist in development...is highly desired. + Familiarity with PCB layout using Altium Designer is desired. +… more
- Google (Goleta, CA)
- …experience working in a physics research environment utilizing software engineering tools for layout design and development. + Experience with Python or other ... years of experience working in physics research environment utilizing software engineering tools for layout design and development. + Knowledge of Layout vs … more
- NVIDIA (Santa Clara, CA)
- …various netlisters + Install, configure and support foundry PDKs + Maintain the custom design environment used by custom schematic and mask designers + Write ... responsible for supporting and maintain CAD tools used by IC designers including Virtuoso, IC -Manage, HSPICE, ADE,...+ A basic understanding of mosfet device behavior, CMOS layout , and VLSI design + Excellent programming… more
- Northrop Grumman (Linthicum Heights, MD)
- …engineering. ATL is responsible for all aspects of semiconductor technology including design , mask making, wafer fabrication, test, and assembly. The candidate ... architect role in the development and execution of mixed-signal/RF IC device test solutions for products in various fab...hardware skills including probe card and package part fixture/DIB design & coordinating layout & assembly +… more
- NY CREATES (Albany, NY)
- …of photonic devices, specifically silicon or III-V photonics + Familiarity with IC layout and verification tools (KLayout, Cadence, Mentor Graphics, Synopsys) ... but are not limited to: + Handling 3rd party design IP. + Design rule checking and...team members. + Coordinating with vendors such as the mask house, dicing/packaging, and any outsourced processes + Integration… more
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