- CACI International (Denver, CO)
- Network Timing Engineer Job Category: Information Technology Time Type: Full time Minimum Clearance Required to Start: TS/SCI with Polygraph Employee Type: ... an ongoing basis. **Opportunity:** We are seeking an experienced Network Engineer to design, implement, and maintain...missions. The ideal candidate will have advanced knowledge of network protocols, data communication systems, and timing … more
- SpaceX (Irvine, CA)
- …critical deadlines, as needed COMPENSATION & BENEFITS: Pay range: Physical Design STA/ Timing Engineer /Level I: $120,000.00 - $145,000.00/per year Physical Design ... will expand the performance and capabilities of the Starlink network . RESPONSIBILITIES: + Develop/support automated block and full chip...STA/ Timing Engineer /Level II: $140,000.00 - $170,000.00/per year Your actual level… more
- SpaceX (Irvine, CA)
- Sr. SOC/ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where ... goal of enabling human life on Mars. SR. SOC/ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER (SILICON...network . RESPONSIBILITIES: + Full chip and block level timing signoff and convergence through timing ecos… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to ... from the crowd: + Background in domain specific STA and timing convergence, such as GPUs, CPUs, DPUs/ Network processors, or SOCs + Understanding of DFT logic and… more
- Google (Sunnyvale, CA)
- …field, or equivalent practical experience. + 3 years of experience in static timing (eg, full chip timing signoff ownership, constraint authoring and ... verification, full chip static timing analysis and timing ECO creation, ...from developing our latest TPUs to running a global network , while driving towards shaping the future of hyperscale… more
- Google (Sunnyvale, CA)
- …field, or equivalent practical experience. + 7 years of experience in static timing (ie, full chip timing signoff ownership, constraint authoring and ... verification, full chip static timing analysis and timing ECO creation, ...from developing our latest TPUs to running a global network , while driving towards shaping the future of hyperscale… more
- Lilly (Indianapolis, IN)
- …Manufacturing. **Position Description and Responsibilities:** The Principal Automation Integration Engineer - API Network Integration will enable information ... role will be focused on supporting sites and projects within the API Network . These systems include (but not limited too) process automation platforms, HMI/SCADA,… more
- Qualcomm (San Diego, CA)
- …+ Apply electrical design expertise to develop Power Distribution Network (PDN) solutions, perform simulation, analysis, and debug. + Conduct power ... complex process flow from high-level design to synthesis, place and route, timing and power use, and verification or similarly for custom circuit design/layout… more
- DISH Network (Littleton, CO)
- …of connectivity by building and enhancing the country's first virtualized, standalone 5G wireless network from scratch. Our network is free of the limitations of ... & 16. + Strong understanding of RF radio operations over eCPRI, CSR, DU/ timing configurations, and latency considerations from gNB to data centers. + Experience with… more
- Iteris, Inc. (VA)
- Iteris is looking for an Engineer to perform transportation or traffic engineering work primarily in traffic signal systems management, operations, signal ... coordination and timing studies under the supervision and guidance of senior...operation and safety studies + Conduct systems integration and network management activities + Perform ITS equipment field implementation… more
- SpaceX (Sunnyvale, CA)
- SOC/ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... ultimate goal of enabling human life on Mars. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets… more
- Qualcomm (San Diego, CA)
- …drive development of advanced methodologies in die-level IR drop, STA, and power. The engineer should be proficient in static timing analysis using the Synopsys ... IR drop analysis and optimization is also helpful. The engineer is expected to propose, develop, and validate new...interaction of IR drop and STA ⦁ Develop physical-aware timing and IR drop ECO solutions ⦁ Collaborate closely… more
- SpaceX (Bastrop, TX)
- Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... goal of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets… more
- Micron Technology, Inc. (Richardson, TX)
- …power per bit solutions in the industry! **Position Overview:** Micron is hiring a Staff Engineer - HBM SOC Physical Design! You will be responsible for the design & ... as needed. + Debugging and identifying root causes and solutions for netlist timing issues or post-silicon timing issues. **Required Qualifications:** + BSEE… more
- Disney Entertainment (The Woodlands, TX)
- …theatrical content. This includes Disney's media supply chain and storage, network and theatrical distribution operations, media localization, network ... Production Software and Virtual Environment and more. The Media Engineer II position is the perfect role for an...with coordinated receiver decoders IRDs, core devices, edge devices, timing of video and audio systems, audio, and video… more
- New York State Civil Service (Watertown, NY)
- NY HELP Yes Agency Transportation, Department of Title Professional Engineer 1 (Civil/Transportation) NYHELPS - Region 7 Occupational Category IT Engineering, ... Watertown State NY Zip Code 13601 Duties Description As a Professional Engineer 1 (Civil/Transportation) in one of the following departments, the selected candidate… more
- Google (Sunnyvale, CA)
- …design flows, and methodologies including synthesis, place and route, Static Timing Analysis (STA), formal verification, Change Data Capture (CDC), and power ... delivering unparalleled performance, efficiency, and integration. As a Circuits Design Engineer , Clock Design you will collaborate with the architecture, logic… more
- SpaceX (Hawthorne, CA)
- GNC Engineer , Phased Array Devices (Starshield) Hawthorne, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... with the ultimate goal of enabling human life on Mars. GNC ENGINEER , PHASED ARRAY DEVICES (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch… more
- Amentum (Houston, TX)
- …electrical, communications system design. + Should be familiar with Hardware for Critical Network Timing Systems used in Command and Telemetry type systems. + ... States. We have an exciting opportunity for a **Command and Data Handling System Engineer ** to join the team with Aerodyne, a teammate company. ** We are actively… more
- SpaceX (Irvine, CA)
- Sr. ASIC Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... the ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets and… more