- Microsoft Corporation (Raleigh, NC)
- …solutions that will manage and optimize the Cloud infrastructure. We are looking for a Senior DFT Engineer to join the team. **Responsibilities** + Execution ... ensuring alignment with overall chip design goals. + Define and implement DFT architecture, including scan insertion, boundary scan, MBIST, and JTAG. + Collaborate… more
- Renesas (Austin, TX)
- Senior Staff DFT Engineer Job Description **About the team:** As part of Renesas's Infrastructure Power Business, you will contribute to the development of ... the datacenter. **What we need:** We are seeking a Mixed-Signal DFT Engineer to ensure efficient, high-coverage, testability for analog and mixed-signal designs.… more
- NVIDIA (Santa Clara, CA)
- …NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the ... + In addition, you will help develop and deploy DFT methodologies for our next generation products. + You...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- Microsoft Corporation (Hillsboro, OR)
- …solutions that will manage and optimize the Cloud infrastructure. We are looking for a ** Senior Design for Test ( DFT ) Engineer ** to join the team. ... **Responsibilities** + Own block level DFT u-arch specification documentation & provide Test solutions in...metrics for Digital logic. + Maintain & enhance existing DFT tools by understanding product needs & tailor solutions… more
- NVIDIA (Santa Clara, CA)
- …with 5+ years, MSEE with 3+ years, or PhD with 2+ years of experience in DFT , system architecture, or RTL design. + Understanding of fundamental DFT topics, such ... of MBIST and IOBIST fundamentals. + Experience in architecting DFT access mechanisms in 3D stacked and dielet/chiplet based...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- Cadence Design Systems, Inc. (Austin, TX)
- …an impact on the world of technology. We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An intimate knowledge and ... SoC/ASIC Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT...( DFT ) + Should possess intimate knowledge of DFT insertion flows + Basic scan chain insertion using… more
- Northrop Grumman (Linthicum Heights, MD)
- …and Static Timing Analysis would be a plus + Active Clearance or higher ** Senior Principal Engineer Basic Qualifications:** + Bachelor's degree with 8 years of ... and maintain an active clearance.** **Roles and Responsibilities:** + Responsible for DFT (Design for Testabilty) aspects of ASIC Design thorough understanding of… more
- Celestica (Richardson, TX)
- …City: Richardson **Summary** We're searching for a dynamic and experienced Functional Design for Test ( DFT ) Engineer to join our team and play a pivotal role in ... developing cutting-edge DFT strategies for advanced hardware systems. If you're passionate...positive team with a balanced mix of young and senior experts + Various Celestica benefits: You will have… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the… more
- NVIDIA (Santa Clara, CA)
- …make a lasting impact on the world. We are now looking for a motivated Senior Timing Closure Engineer to join our dynamic and growing Circuit Solutions Group! ... timing closure strategy, timing constraints, timing and power convergence, DFT , as well as ECO implementation. What we need...to stand out from the crowd: + Understanding of DFT logic and experience with DFT timing… more
- Celestica (Richardson, TX)
- …be the best partners to our customers and our colleagues. **Responsibilities** **The Senior Lead Engineer - Manufacturing Process** is responsible for designing, ... Creation, IPC-610, Quality Dat (KPI), DFM - Manufacturing, DFA - Assembly, DFT / Physical Test, DFT - Electrical Test + MACHINING & OTHER : ESD Controls, Pack… more
- General Motors (Warren, MI)
- …MI or Sunnyvale, CA as directe_ d. **Design for Manufacturing, Testing, Tooling Engineer ** **The Role:** General Motors is at the forefront of the transformation of ... compute and autonomous capabilities. _We are establishing a team of_ **_Senior_** **_DFM/ DFT engineers_** in a dynamic, high-energy, and innovative group focused on… more
- Google (Sunnyvale, CA)
- Senior ASIC Physical Design Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and mentoring more ... flows (eg, LEC, PI/SI, DRC/LVS, etc.). + Understanding of DFT including Scan, MBIST and LBIST. + Understanding of...integration within AI/ML-driven systems. As an ASIC Physical Design Engineer , you will collaborate with RTL, Design for Testing… more
- Northrop Grumman (Jessup, MD)
- …new advantages to the warfighter. We are seeking a front-end ASIC design engineer for design and verification of full-custom digital circuits. Must be proficient in ... both are listed below:** **Basic Qualifications for Principal Digital ASIC Circuit Design Engineer Level:** + Bachelor's degree in a technical area (BSEE or other… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Timing Engineer to join our dynamic and growing team. If ... such as GPUs, CPUs, DPUs/Network processors, or SOCs + Understanding of DFT logic and experience with DFT timing closure for various modes eg, scan, BIST, etc. +… more
- General Motors (Warren, MI)
- …design and development of our vehicle displays hardware. In this role, the Senior Hardware Design Engineer - Display Development will be responsible for ... (DFM), design for assembly (DFA), and design for testing ( DFT ) + Drive the validation and testing of hardware...(DFM), design for assembly (DFA), and design for testing ( DFT ) + Excellent problem-solving, analytical, and communication skills. +… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit Solutions Group! NVIDIA has continuously ... + Work with front-end teams to overlook correctness of the design (Lint/NA/CDC/Synthesis/ DFT /LEC/STA) + Partner and work with back-end team until chip tape-out. +… more
- GE HealthCare (Florence, SC)
- **Job Description Summary** The Senior Engineer contributes to the design and development advanced technology solutions and systems. Include activities linked to ... and established methodologies. + Lead the definition of Design for Test ( DFT ) and end-to-end test strategies for production processes, working with plant teams… more
- NVIDIA (Santa Clara, CA)
- We are looking for a creative and experienced ATE Test Engineer . NVIDIA has continuously reinvented itself over three decades. Our invention of the GPU in 1999 ... participate in cross function team including Product Development Engineering, DFT , and IC design to efficiently debug any product...are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... GPUs or Network processor implementation or SOCs. + Understanding of DFT logic and experience with DFT timing closure for various modes eg, scan shift and… more
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