• Principal Physical Design Engineer

    Microsoft Corporation (Hillsboro, OR)
    …timing analysis ( STA ), and timing-power optimization. + Thorough understanding of SOC or subsystem design trade-offs across power, performance, and area ... planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware .We are looking for a **Principal Physical Design Engineer**… more
    Microsoft Corporation (01/09/26)
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  • Sr Advanced FPGA Design Engineer

    Honeywell (Phoenix, AZ)
    …and engagement, and fostering an inclusive culture. **KEY RESPONSIBILITIES** + VHDL, DSP, and STA knowledge + Xilinx FPGA design and development + IC experience ... As a Sr Advanced Semiconductor FPGA Design Engineer here at Honeywell, you will play...VALUE** + Professional knowledge of the DO-254 Airborne Electronic Hardware development lifecycle + Professional knowledge of VHDL or… more
    Honeywell (10/16/25)
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  • Physical Design Engineer, University…

    Google (Sunnyvale, CA)
    …scripting using Languages like Python, Tcl, Perl. + Proficiency in fundamental SoC architecture and hardware description languages such as Verilog, facilitating ... Physical Design Engineer, University Graduate, PhD _corporate_fare_ Google _place_...finfet, Gate all around). + Understanding of Static Timing Analysis( STA ), Clock Domain Crossings (CDC), clock/power distribution and analysis,… more
    Google (12/24/25)
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  • Sr. Design Engineering Architect - Front…

    Cadence Design Systems, Inc. (Austin, TX)
    …the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware , and intellectual property to ... (North America) team is looking for an experienced candidate to lead Front End Design projects. This is a challenging and rewarding opportunity is for a highly… more
    Cadence Design Systems, Inc. (12/10/25)
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  • Specialist, Electrical Engineer (ASIC / FPGA…

    L3Harris (Herndon, VA)
    …Clearance. + Experience mapping algorithms and standards (Ethernet, TCP/IP, AXI) to hardware and architecture/system design tradeoffs. + Proficient in VHDL ... domains in the interest of national security. Job Title: Specialist ASIC/FPGA Design Engineer Job Code: 30424 Job Location: Herndon, VA (on-site) Schedule: 9/80… more
    L3Harris (01/07/26)
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  • Sr. DFT Design Engineer, AWS Machine…

    Amazon (Austin, TX)
    …a member of the Silicon Optimization Engineering Team you'll be responsible for the design and optimization of hardware in our data centers. You'll provide ... possible today. Key job responsibilities * Develop, implement and verify state-of-the-art Design for Test (DFT) architectures * Work with block designers to… more
    Amazon (12/25/25)
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  • ASIC/FPGA Design Engineer (SMES)

    L3Harris (Camden, NJ)
    …products. + Experience mapping algorithms and standards (Ethernet, TCP/IP, AXI) to hardware and architecture/system design tradeoffs. + Proficient with CDC, RDC. ... in the interest of national security. Job Title: ASIC/FPGA Design Engineer (SMES) Job Code: 32295 Job Location: Camden,...+ Generate test plans + Perform module level verification, synthesis/ STA , Lab debug, SW driven validation on Linux based… more
    L3Harris (12/20/25)
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  • Sr Principal Product Engineer - Memory IP

    Cadence Design Systems, Inc. (San Jose, CA)
    …more than 30 years of computational software expertise. We apply our Intelligent System Design strategy to deliver software, hardware , and IP that turn design ... and debug of Memory IP subsystems. + Support customer SOC and system integration, including ATE deployment and production...modern life depends on. We are a global electronic design automation company, providing software, hardware , and… more
    Cadence Design Systems, Inc. (11/22/25)
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  • Senior Silicon Bringup and Test Lead, Raxium

    Google (Fremont, CA)
    …qualifications:** + 15 years of experience in Application-Specific Integrated Circuit/System on Chip (ASIC/ SoC ) design , with a focus on both digital logic ... practical experience. + 10 years of experience in analog circuit design , including simulation and verification. + Experience working with relevant Electronic… more
    Google (01/07/26)
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