- Qualcomm (San Diego, CA)
- … solutions which are setting benchmarks in the whole industry. As an SOC Verification and Methodology Engineer , you will be responsible for ensuring the ... and resolve design issues. In this role of Design Verification Engineer , you will be using advanced...verification skills & experience with assertion & coverage-based verification methodology + Knowledge of SOC… more
- Qualcomm (San Diego, CA)
- … solutions which are setting benchmarks in the whole industry. As an SOC Verification and Methodology Engineer , you will be responsible for ensuring the ... and resolve design issues. In this role of Design Verification Engineer , you will be using advanced...verification skills & experience with assertion & coverage-based verification methodology + Experience in handling … more
- Capgemini (Seattle, WA)
- **Job Role:** ** SOC Design Verification Engineer ** **Job location: Seattle WA** **Job Description:** We are looking for SOC Design Verification ... 8 to 10 years of hands-on experience in SystemVerilog/UVM methodology + Experience in one or more of the...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - SOC Design Verification … more
- Qualcomm (Santa Clara, CA)
- …based verification skills, experience with assertions, and coverage-based verification methodology + Strong leadership, Analytical and problem-solving skills ... complex IP blocks and subsystems. **Job Responsibilities** + Lead Sub-System & SoC Design verification for Qualcomm WIFI projects + Own end-end low power test… more
- Capgemini (MN)
- …6-10 years of experience * Deep understanding of SystemVerilog UVM and coverage driven verification methodology * History of building and improving UVM based ... **Job description:** We are looking for a Senior Hardware SoC Model Engineer with expertise in Renode. The...verification methodology * Ability to… more
- SpaceX (Irvine, CA)
- Sr. SOC /ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where ... ultimate goal of enabling human life on Mars. SR. SOC /ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER ...with power intent and upf development for block and soc top. + Familiar with formal verification … more
- Qualcomm (San Diego, CA)
- …variation. We are currently seeking an experienced candidate for the position of SoC Debug Engineer . **Key Responsibilities** In this role, the candidate will ... **General Summary:** Qualcomm's Silicon Validation team, part of the Snapdragon SoC hardware development organization, is responsible for the overall quality of… more
- Qualcomm (San Diego, CA)
- …are currently seeking a Senior candidate for the position to perform of SoC Debug Engineer for Server/Compute/Mobile chipsets. **Key Responsibilities:** In this ... + Strong Knowledge of TCU, PVT, Fmax, Vmin test methodology and hands-on experience + CPU and SoC...or related field and 6+ years of ASIC design, verification , validation, integration, or related work experience. OR Master's… more
- SpaceX (Irvine, CA)
- SOC /ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where ... the ultimate goal of enabling human life on Mars. SOC /ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER ...physical design flow + Work with systems and architecture, SOC integration, verification , DFT, mixed signal, IP… more
- Google (Sunnyvale, CA)
- …Experience developing common library RTL modules and working on PCIe verification and bringup. + Understanding of digital design fundamentals, including synchronous ... this role, you will join a team working on SoC -level RTL design for our data center accelerators. You...and control subsystem, also participate in developing infrastructure and methodology that form the foundation of our SoCs (ie,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …& route and signoff) and/or experience with functional and formal verification tools/ methodology , VIP. Understanding of semiconductor manufacturing eco-systems. ... the core technology requirements in the digital implementation and/or functional/formal verification space , coordination of sales strategies and efforts across… more
- Qualcomm (San Diego, CA)
- …Engineering Group, Engineering Group > ASICS Engineering **General Summary:** As a Timing Engineer , you will play a vital role in Timing analysis targeting the ... with best-in-class methodologies, tools and technology to design innovative SOC products at the block/IP-level and at system-level in...and Tempus. + You will facilitate and drive STA methodology for Qualcomm using PT-SI, Tempus and best in… more
- BrainChip, Inc. (Laguna Hills, CA)
- …ASIC Verification Engineer primary job function is Pre-Silicon Design Verification Machine Learning IP and SOC designs using industry standard ... top-level. Collaborate with other team members to define a verification methodology and a test plan. Develop...scoreboards, and coverage collectors Build self-checking test benches for SoC blocks and chip top-level verification . Develop… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement hardware and software ... solutions to debug world's leading SoC 's and GPU's. This position offers the opportunity to...at NVIDIA. + Work closely with software, architecture, design, verification , and silicon validation teams. + Train and mentor… more
- Meta (Columbus, OH)
- …to build IP and System On Chip ( SoC ) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team working with the best ... a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC verification … more
- Meta (Austin, TX)
- …to build IP and System On Chip ( SoC ) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team working with the best ... a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC verification … more
- Meta (Austin, TX)
- …to build IP and System On Chip ( SoC ) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team working with the best ... a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/IP/ SoC verification … more
- Meta (Austin, TX)
- …to build IP and System On Chip ( SoC ) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team working with the best ... a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP/ SoC verification … more
- Amazon (Sunnyvale, CA)
- …Echo, and the Astro personal robot. What will you help us create? As an ASIC Methodology / CAD engineer you will create and maintain automated design flows that ... ASIC products. Key job responsibilities - Develop automated flows for improving the SoC design process - Build robust, scalable tools that help verify and validate… more
- Qualcomm (Santa Clara, CA)
- …the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification lifecycle, ... for digital power IP's, its testbench development using the advanced verification methodology such as SystemVerilog-UVM, coverage development, assertion model… more