- NVIDIA (Santa Clara, CA)
- …BSEE minimum or equivalent experience, MSEE or PhD preferred + 10+ years of SRAM design experience with strong background in layout, process understanding, and ... (ATG) at NVIDIA is an organization of process, CAD, design , and test engineers that works closely with foundry...We are looking to hire a skilled and creative SRAM circuit designer to help achieve these goals in… more
- Texas Instruments (Dallas, TX)
- …Department of the Technology and Manufacturing Group. Responsibilities include SRAM bitcell design , process integration, SWR/DOE (experiments) definition ... **Job Description:** Being responsible for SRAM memory device development, you will join a...definition, creation, demonstration, and delivery and work with multiple design groups to capture requirements and to evaluate tradeoffs… more
- Qualcomm (San Diego, CA)
- …memories for SoC applications + Strong knowledge in CPU L1/L2 cache design , compiler SRAM /Register File architectures and advanced custom circuit implementations ... Snapdragon products. This is a highly visible role where your design will highly influence various parts of CPU/GPU/Modem/NSP/Camera designs. Positions will… more
- NVIDIA (Santa Clara, CA)
- …on the physical layout design and development of our next generation custom SRAM macro-IPs. As part of the Digital Full-Custom Macro Team, you will work with ... We are now looking for a Senior Mask Design Engineer! NVIDIA has continuously reinvented itself over...you will be doing: + Perform physical layout of SRAM and datapath circuits using Cadence tools. + Your… more
- Amazon (Sunnyvale, CA)
- …learning-enabled consumer products. We are looking for exceptional engineers to join our SoC design team and help develop the next generation of chips based on a ... with System Architects, SoC architects, IP developers and physical design teams to develop SoCs that meets the power,...USB. LPDDR controller & Phy IP integration, embedded memory ( SRAM , OTP etc;.) Other IP integration such as ADC,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …on the world of technology. Cadence is a pivotal leader in electronic design , building upon more than 30 years of computational software expertise. The company ... applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that...about industry standard interfaces such as PCI Express, DRAM/DDR4, SRAM , I2C, JTAG, AXI The annual salary range for… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …a huge success with our customers. With Cadence(R) Protium (TM) prototyping platforms, design and verification teams can rapidly bring up a prototype and provide a ... product in FPGA Emulation/Prototyping domain. This role is to design , verification, timing closure and hardware validation of the...about industry standard interfaces such as PCI Express, DRAM/DDR4, SRAM , I2C, JTAG, AXI The annual salary range for… more
- Renesas (San Jose, CA)
- Senior Manager of Digital IC- Design Job Description This is a **Senior Manager** position for a qualified individual to work in Renesas' Analog and Connectivity ... Group. The primary role is to manage a digital design team and lead the team to develop IC...packet-oriented protocols. + Good knowledge of embedded memories - SRAM , OTP, MTP and EE/Flash memory + Good knowledge… more
- BrainChip, Inc. (Laguna Hills, CA)
- BrainChip is seeking a Digital Design Engineer to join a team working on cutting-edge and novel AI hardware. The primary job function is to work with team members to ... design and develop digital modules from concept stage to...Fluent in Verilog and SystemVerilog Knowledge of CPU and SRAM based SoC components and system busses (AXI, AHB,… more
- Broadcom (Irvine, CA)
- …Candidate Account, please Sign-In before you apply.** **Job Description:** **Memory Circuit Design Engineer** We are looking for energetic and passionate memory ... design engineers to join our Central Engineering Group and...+ Working Knowledge of Common memory types such as SRAM , RF, ROM and familiarity with CMOS digital circuits… more
- Qualcomm (Santa Clara, CA)
- …the overall package design , including: + Utilizing experience and expertise in SRAM , DRAM, DDR, LPDDR, HBM, GDDR and newly emerging memory technologies to drive ... As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and...IBIS AMI models. + Outstanding memory architecture expertise on SRAM , DRAM, DDR, LPDDR, HBM, GDDR and emerging memory… more
- Astronics (Clackamas, OR)
- …experience. **Primary Duties and Responsibilities:** **FPGA Development:** + Implement and test new SRAM and DMA modules for image data flow. + Update and optimize ... blocks for new hardware compatibility. + Contribute to FPGA design updates and integration. **Calibration & Image Quality Tuning:**...sensor integration and calibration a plus. + Experience with SRAM and DDRAM is a plus. + Strong documentation… more
- Capgemini (Minneapolis, MN)
- …Memory Layout Engineer, where you'll collaborate closely with SoC partners to craft innovative SRAM and Register File layout designs. You'll play a key role in ... design reviews, contributing to the continuous improvement of memory...of memory layout quality and performance. **Your Role** + Design and implement custom memory layouts for advanced technology… more
- Micron Technology, Inc. (San Jose, CA)
- …Hardware design and development; 4. Memory Technologies, including DRAM, SRAM , Flash, emerging non-volatile memories like PCM, ReRAM, MRAM, and their operation, ... systems, and graphics platforms. Collaborate with cross-functional teams, from design to manufacturing, to transform architectural concepts into tangible products.… more
- Meta (Sunnyvale, CA)
- …including (Lint, CDC, RDC, Synthesis, STA, Power) 9. Work closely with the Design Engineers, DV Engineers, Emulation Engineers in supporting them with the handoff ... tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback **Minimum...as Floorplanning, CTS, Routing 19. Understanding of Timing/physical libraries, SRAM Memories 20. Knowledge of STA signoff and understanding… more
- Meta (Sunnyvale, CA)
- …Hierarchical Reset Domain crossing Checks. Understand the Reset-Architecture by working with Design and Firmware teams and develop reset groups and the corresponding ... Perform RTL Lint and work with the Designers to create waivers 4. Perform RTL Design for Testability Analysis and improve the Design for Testability coverage for… more
- Meta (Sunnyvale, CA)
- …for all FE-tools including ( Synthesis, STA) 6. Work closely with the Design Engineers, DV Engineers, Emulation Engineers in supporting them with the handoff tasks. ... Interact with Physical Design Engineers and provide them with timing/congestion feedback **Minimum...build tools and flows 19. Knowledge of Timing/physical libraries, SRAM Memories **Public Compensation:** $142,000/year to $203,000/year + bonus… more
- Amazon (Austin, TX)
- …machine learning chips. They will interact with ATE, Systems test teams and Silicon design teams to identify systematic yield issues and work on debug to find root ... and targeted characterization efforts to collect critical performance data. - Design and maintain comprehensive dashboards enabling cross-functional teams to monitor… more