• Custom SOC IP Verification

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking a Senior Custom SOC /IP Verification Engineer to verify the next generation SoC and IP solutions! We are looking for special individuals ... to be. This role specifically requires a skilled ASIC Verification Engineer with expertise in cache coherency... verification , particularly in cache coherency or memory subsystem verification . + Strong knowledge of System… more
    NVIDIA (06/27/25)
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  • Senior SoC HW (Analog/Functional)…

    Microsoft Corporation (Hillsboro, OR)
    …technical engineering experience OR equivalent experience. + 4+ years of experience in SoC subsystem , SoC system level, and platform level functionality ... performing complex and high-performance functions. We are looking for a **Senior SoC HW (Analog/Functional) Validation Engineer ** to join the team.… more
    Microsoft Corporation (07/31/25)
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  • Senior ASIC Design Verification

    Qualcomm (San Diego, CA)
    …that meet performance, security, technology, and feature requirements. As a Design Verification Engineer , you will work with Chip Architects to validate ... smarter, connected future for all. As a Qualcomm Design Verification Hardware Engineer , you will plan, design,...the end Product. **Role and Responsibilities** + Work with subsystem and SOC Architects to understand the… more
    Qualcomm (06/12/25)
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  • ASIC Engineer , Formal Verification

    Meta (Boston, MA)
    …to build IP and System On Chip ( SoC ) for data center applications. As a Formal Verification Engineer , you will be part of a team working with the best in the ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization....with targeted Formal Verification Techniques at IP, Subsystem and SoC level 5. Build reusable/scalable… more
    Meta (08/01/25)
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  • ASIC Engineer , Formal Verification

    Meta (Sunnyvale, CA)
    …to build IP and System On Chip ( SoC ) for data center applications. As a Formal Verification Engineer , you will be part of a team working with the best in the ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization....with targeted Formal Verification Techniques at IP, Subsystem and SoC level 5. Build reusable/scalable… more
    Meta (08/01/25)
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  • CPU Verification Engineer (Multiple…

    Qualcomm (Santa Clara, CA)
    …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Design Verification Engineer , you will work with Chip Architects to validate the ... concepts of CPU and SOC level micro-architectures. You will work on a selected...work on a selected part of the CPU Design Verification to ensure that it functions to the standards… more
    Qualcomm (07/04/25)
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  • Senior ASIC Verification Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking an outstanding Senior ASIC Verification Engineer to verify the design and implementation of the world's leading SoC 's and GPU's. This ... computing. What you'll be doing: + As a Senior Verification Engineer at NVIDIA, you will be... scope, and contribute to the development of the verification infrastructure for memory subsystem units +… more
    NVIDIA (07/18/25)
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  • Senior ASIC Verification Engineer

    NVIDIA (Westford, MA)
    …relevant experience + Strong background in Verilog/SystemVerilog, and familiarity with unit, subsystem , or SoC -level verification . + Expertise in UVM-based ... NVIDIA is seeking a highly motivated Senior Design Verification Engineer to play a critical role in verifying next-generation NVLink High-Speed I/O (HSIO)… more
    NVIDIA (06/13/25)
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  • ASIC Design Engineer - New College Grad

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA, you'll join a group of hard-working ... be doing: + As a member of our Memory Subsystem Design team, you will collaborate with architects, software...and circuit designers to deliver a world-class solution. NVIDIA SOC Interconnects, , ordering controllers and accelerators are among… more
    NVIDIA (08/01/25)
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  • ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA, you'll join a group of hard-working ... be doing: + As a member of our Memory Subsystem Design team, you will collaborate with architects, software...circuit designers to and deliver a world-class solution. NVIDIA SOC Interconnects are among the industry's most sophisticated because… more
    NVIDIA (08/01/25)
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  • Sr System I&T Engineer , KGS Integrated…

    Amazon (El Segundo, CA)
    … at various products levels including but not limited to system-on-chip ( SoC ) calibration algorithm verification , silicon wafer and photonics test, test ... a global scale. The System Integration & Test (I&T) engineer will engage with an experienced cross-disciplinary team to...test architecture supports all aspects of the integration, test, verification , and validation of one or more of the… more
    Amazon (07/25/25)
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  • Senior JBoss Engineer

    GovCIO (Washington, DC)
    **Overview** GovCIO is currently hiring for a **Senior JBoss Engineer ** to support our client's contract needs. This position is located in the Washington, DC and ... JAAS, and Elytron security (modern Red Hat EAP security subsystem ). + Manage key EAP subsystems: + Datasources (JDBC)...and security teams. + Align with compliance standards (eg, SOC 2, ISO 27001, PCI-DSS, HIPAA). + Define security… more
    GovCIO (07/03/25)
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  • ASIC Engineer , DFT

    Meta (Sunnyvale, CA)
    …implementation, and verification to build best-in-class System on a Chip ( SOC ) and IP for data center applications. We are looking for individuals with ... Engineering or Computer Engineering 16. Experience with mixed-signal DFT methodologies, at IP subsystem , SOC , or disaggregated SOCs (2.5D or 3D) 17. Experience… more
    Meta (08/01/25)
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  • CPU Power Management Firmware Engineer

    Qualcomm (Santa Clara, CA)
    …developing, characterizing and tuning solutions for power limiting, thermal limiting for an SoC subsystem will be a considerable plus. . Familiarity with ARM ... implement embedded firmware to manage operation of the CPU subsystem within the allocated power and thermal budgets. You...new platforms, as well as providing input to our SoC and platform architects on future designs. **Minimum Qualifications:**… more
    Qualcomm (07/25/25)
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  • Electrical Design Validation Engineer

    Meta (Sunnyvale, CA)
    …a plus 20. Masters in Electrical Engineering or Computer Science 21. Firmware verification experience 22. Experience in System and Subsystem power ... **Summary:** Electrical Design Validation Engineer in Wearables Hardware will be an integral...Hardware will be an integral member of the design verification + validation team that ensures our designs are… more
    Meta (08/01/25)
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  • Electrical- Low-Power Validation engineer

    Capgemini (Redmond, WA)
    …across laptops and mobile devices, with responsibilities spanning power design verification , subsystem power analysis, and compliance testing. If you ... quality test plans, and draft detailed test procedures. Execute power design verification for subsystems including SoC , memory, RF, sensors, storage, display,… more
    Capgemini (06/13/25)
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  • Principal Senior Engineer - FPGA Design…

    BAE Systems (Westminster, CO)
    …reliability electronic systems. Assignments include designs which will include SOC architectures, digital filters, image processing algorithms, and communication ... interfaces/protocols. + Architect and lead complex FPGA SoC designs with AMD (Xilinx) software and IP. +...+ Ability to work requirements and flow down for system/ subsystem /box/board needs. + Good communication skills as well as… more
    BAE Systems (05/22/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …Senior ASIC Design Engineer to design and implement the world's leading SoC 's and GPU's. This position offers the opportunity to have a real impact in ... responsible for the micro-architecture and design implementation of GPU memory subsystem modules. + Make architectural trade-offs based on features, performance… more
    NVIDIA (07/31/25)
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  • Principal Embedded Software Engineer

    Umbra Lab (Santa Barbara, CA)
    …has never meaningfully existed before. We are seeking an experienced Principal Software Engineer to play a key role in delivering embedded flight software for Umbra ... work methodologies. You will be engaged with the Chief Engineer , the senior members of the engineering team, and...campaigns, including unit testing and automated tests at both subsystem and system levels. + Create and maintain detailed… more
    Umbra Lab (05/28/25)
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  • Hardware Systems Engineer

    Meta (San Diego, CA)
    …define success criteria. In this role, you will execute validation and verification activities for new product integration, including system-level and subsystem ... and systemic issues, and drive resolutions. **Required Skills:** Hardware Systems Engineer Responsibilities: 1. Lead hardware and technology teams through all phases… more
    Meta (08/01/25)
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