- US Tech Solutions (Goleta, CA)
- …independently and take ownership of verification deliverables within a UVM /SystemVerilog environment. + The engineer will collaborate with design, ... **Job Description:** + The Verification Engineer will contribute to the... prior to tape-out. **Responsibilities:** + Perform pre-silicon functional verification of digital designs using UVM… more
- Northrop Grumman (Linthicum Heights, MD)
- …of your career. We are looking for you to join our team as a Principal Digital Verification Engineer /Senior Principal Digital Verification ... NC. This requisition may be filled as a Principal Digital Verification Engineer or a...complex ASIC at block level and SOC level using UVM (Universal Verification Methodology) and SystemVerilogl. +… more
- Snap Inc. (Vancouver, WA)
- …AR + Work closely with digital design, analog logic, software and verification engineers + Develop and implement UVM -based and assertion-based testbenches + ... and working better together. We're looking for a Design Verification Engineer to join the Spectacles Team...knowledge of UVM and SystemVerilog for advanced verification methodologies + Strong knowledge of digital … more
- Northrop Grumman (Linthicum Heights, MD)
- …**_This work will be done 100% onsite in Linthicum, MD._** **Basic Qualifications Staff Digital Verification Engineer :** + Bachelor's degree in a technical ... and able to obtain and maintain a security clearance.** **Preferred Qualifications Staff Digital Verification Engineer :** + Advanced Degree either MS or… more
- Renesas (Duluth, GA)
- Principal Digital Verification Engineer Job Description . Verification of DDR5 Data Buffer to meet functional and performance specifications. . Be able ... and/or improve design behavior. . Support in optimizing UVM based testbench. . Take ownership of verification...This exciting role is responsible for the development of digital sections of leading-edge memory data buffer chips for… more
- Broadcom (San Jose, CA)
- …Sign-In before you apply.** **Job Description:** Broadcom is looking for a senior level Digital Design Verification engineer . In this highly visible role you ... PhD in Electrical Engineering or Computer Engineering with 10+ years of experience in digital design verification + Hands on experience in SV UVM , SV RNM and… more
- Huntington Ingalls Industries (Fort Meade, MD)
- …Engineering, Computer Science, or a related field * Experience with modern digital verification and modeling languages: SystemVerilog, SystemC, C/C++, Matlab, ... short video: https://vimeo.com/732533072 Job Description Do you enjoy challenging digital design verification problems? HII Mission Technologies...etc. * UVM concepts * Directed, constrained-random, and assertion-based … more
- Northrop Grumman (Jessup, MD)
- …engineers to make these technologies a reality. **What You'll Get To Do:** As a Digital Verification Lead Engineer , you will have an opportunity to be ... Test (SEIT) department is seeking a Staff Lead Design Verification Engineer to join our team and...comprehensive test-benches for behavioral simulation + Design and implement verification strategies for complex digital systems +… more
- Northrop Grumman (Linthicum Heights, MD)
- …Sr. Principal level. Qualifications for both are listed below:** **Basic Qualifications Principal Digital Verification Engineer :** + Bachelor's degree in a ... Top Secret/SCI security clearance with Polygraph** **.** **Basic Qualifications Senior Principal Digital Verification Engineer :** + Bachelor's degree in a… more
- SpaceX (Sunnyvale, CA)
- Design Verification Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... ultimate goal of enabling human life on Mars. DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're...capabilities of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC verification at block and system… more
- Lockheed Martin (Denver, CO)
- **Description:** Join Our Team as a **ASIC/FPGA Verification Engineer ** where you will work on the development of a sophisticated state\-of\-the\-art avionics ... seeking a highly talented and motivated **ASIC & FPGA Verification Engineer ** who has a passion for...for a given design\. * Use SystemVerilog and Universal Verification Methodology \( UVM \) to verify a design… more
- BAE Systems (Westminster, CO)
- …may be available based on position level and/or job specifics. **Senior Principal FPGA Verification Engineer - $15K Sign On Bonus** **115210BR** EEO Career Site ... used across multiple projects. + Work in a System Verilog/ UVM environment developing tests, testbenches, UVM components,...(eg Ruby, Python, TCL). + Experience in documentation and verification of high-speed digital electronics, FPGAs, and… more
- BAE Systems (Largo, FL)
- …be available based on position level and/or job specifics. **Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)** **119933BR** EEO Career ... your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop verification environments.… more
- BAE Systems (Cedar Rapids, IA)
- …may be available based on position level and/or job specifics. **Senior Engineer - ASIC/FPGA Verification (hybrid)** **119641BR** EEO Career Site Equal ... navigation missions. BAE is looking for experienced senior level ASIC/FPGA Design Verification Engineers who can plan, architect, and develop verification … more
- Amazon (Austin, TX)
- …or Ph.D degree in Electrical / Communications Engineering - 3+ years in digital verification , preferably in communication systems - Familiarity with Matlab - ... Work with the design and communication systems team and participate in system level verification using test benches constructed using UVM . Develop a highly… more
- Amazon (North Reading, MA)
- …Electrical / Computer Engineering or related field - 5+ years experience in digital verification , preferably in image processor, SoC/Interfaces - 3+ years ... Build assertions, traffic generators and scoreboards in SystemVerilog and UVM - Execute testplans and perform rigorous debug Basic...PH.D in Computer Engineering - 8+ years experience in digital verification , preferably in areas of image… more
- Amazon (San Diego, CA)
- …or Ph.D degree in Electrical / Communications Engineering - 10+ years in digital verification , preferably in communication systems - Familiarity with Matlab - ... Work with the design and communication systems team and participate in system level verification using test benches constructed using UVM , SystemC and DPI-C .… more
- Google (Sunnyvale, CA)
- …an ASIC Design Verification Engineer , you will use design and verification expertise to verify complex digital designs. You will collaborate closely with ... ASIC Design Verification Engineer , Machine Learning _corporate_fare_ Google...loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs,… more
- BAE Systems (Westminster, CO)
- …environment to provide continuously evolving capabilities in space payloads. As an FPGA Verification engineer , you will work with a team of electrical and ... tools including Xilinx Vivado/Vitis and Mentor Modelsim/Questasim. + Experience with OVM/ UVM Verification methodologies. + Ability to work requirements and… more
- Cisco (Maynard, MA)
- …that empowers an inclusive future for all. **Your Impact** The ASIC Design Verification Technical Lead Engineer will be working on next-generation 100G-1.6T ... role requires someone to demonstrate their experience applying sophisticated verification techniques to ASIC projects: ensuring design quality, leading sophisticated… more
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