We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- NVIDIA (Santa Clara, CA)
- …to join us today. We are now looking for a highly motivated DFT Engineer to join this dynamic and innovative hardware team at NVIDIA. Our Design-for-Test ... team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the… more
- Amazon (Sunnyvale, CA)
- …Edge that is powering the latest generation of Echo devices is looking for a Sr . SOC Design Engineer -STA to continue to innovate on behalf of our customers. ... - Work for Systems and Architecture, SoC Integration, Verification, DFT , Mixed Signal, IP owners, Synthesis, Place & Route...micro-architecture, RTL design and functional verification - Experience with DFT and DFM flows Amazon is committed to a… more
- Amazon (Sunnyvale, CA)
- …Edge that is powering the latest generation of Echo devices is looking for a Sr . Physical Design Engineer to continue to innovate on behalf of our customers. ... planning, bus routing, sequential pipeline planning and top-level design for testability ( DFT ). - Be responsible for driving efficiency and quality improvements to… more
- Amazon (Sunnyvale, CA)
- …and underserved communities around the world. Come work at Amazon! The Role: As Senior Silicon ATE Test Engineer , you will engage with an experienced ... JTAG and boundary-scan techniques. Understand of and experience with DFT and DFM. Experience with ATE hardware ...with DFT and DFM. Experience with ATE hardware development and debugging. Experience with running firmware on… more
- NVIDIA (Santa Clara, CA)
- …complex challenges across diverse industries. NVIDIA Silicon Solutions Group is seeking a versatile engineer to be part of the HW ArchDev team. The SSG team is ... and manufacturability. + Collaborate and Lead: Collaborate across System Architecture, DFT , ASIC, SW/FW, platform, validation, and production teams throughout the… more
- Palo Alto Networks (Santa Clara, CA)
- …for the manufacturing capabilities to build our next-generation network firewalls. As a senior test engineer , you will be responsible for building advanced test ... and routing + Manage the development of test fixtures and hardware requirements + Excellent understanding of electronics manufacturing and service requirements… more
- NVIDIA (Santa Clara, CA)
- …the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and ... members, we deliver clock information to GPU, CPU and SOC verification team, timing and DFT teams. You will use Perl to improve the productivity of the above teams.… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a DFT Methodology Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the ... failure processing, and test program development + Knowledge of DFT security and hardware system security is...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- NVIDIA (Santa Clara, CA)
- We are looking to hire a Senior Board Test Engineer who will work in the Test Solutions Group at NVIDIA developing manufacturing GPU/CPU test solutions for Data ... today! What you will be doing: + Define manufacturing hardware test solutions that translate into methodologies and processes...and validation infrastructure. + Review and provide feedback for DFT in the early design stages. + Debug complex… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing team. If you are looking for a challenging and exciting role in ... circuits (digital, semi-custom and mixed-signal analog) for silicon correlation and hardware security. + Collaborate and work closely with cross-functional teams to… more
- Amazon (Cupertino, CA)
- …Acceleration team you'll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine ... responsibilities - integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/ DFT signal routing - As a key member of the ASIC design… more