- Broadcom (San Jose, CA)
- …Science + 10 years of EDA experience. + Expertise in the following CAD Tools: Virtuoso Studio 25.1, Cadence ADE-L/XL, Maestro, Spectre, Virtuoso Layout, Quantus QRC, ... and post-layout extraction challenges and problems. + Experience in all phases of CAD tools from evaluation, QA, test, release, and user support to documentation +… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …who want to make an impact on the world of technology. Senior Principal Design Engineer The Sr Principal Analog IC Designer is responsible for design and ... developing analog/mixed-signal IC circuit blocks, the architecture and initial concept/specification through...design is a strong asset . Proficiency in using CAD tools for circuit simulation, layout, and post-layout verification… more
- Broadcom (San Jose, CA)
- …compute cores and CPUs. We are seeking a motivated and technically strong engineer to join our team. Job Description: Layout design of digital high-performance ... and layout engineers to optimize layout for area and performance Work with CAD , packaging and foundry teams in resolving layout and/or verification issues Ideal… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …technical skills to enable semiconductor companies adopting Cadence solutions and associated IC design methodologies. The Application Engineer will work with ... Cadence solutions with an emphasis on our leading Custom IC Virtuoso Studio platform. The successful engineer ...Engineering / Physics + 3+ years' experience of analog/mixed-signal IC layout/design or CAD support, ideally within… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …impact on the world of technology. Experience should include: + Deep understanding of IC layout on advanced node, 16nm or below, geometries. + Layout techniques for ... high speed routing, electromigration and power planning. + Expert at custom/analog IC physical implementation and automation. + A good understanding of parasitic RC… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …with Cadence IC packaging tools is required + Must possess expertise in 2.5D/3D- IC packaging technologies + CAD experience in setting up Cadence tools is ... make an impact on the world of technology. Application Engineer Architect for Allegro Package Design Tools - San...onsite support. This will involve working with state-of-the-art complex IC packaging of electronics using highly integrated IC… more
- Celestica (San Jose, CA)
- …an unrelenting drive to find the way for our customers. Let's engineer the future together. Responsible for architecting, implementing, and supporting power system ... work with SI engineers to define SI constraints, Guide CAD designers and bring-up and debug issues. + Set...create and maintain the preferred list + DC relevant IC selection, create and maintain the preferred list +… more