- Ayar Labs (San Jose, CA)
- Engineer - ASIC Design Verification Location:...a dynamic startup environment as part of a small IC design team. The ideal candidate is a hands-on ... (this is an on-site position) Summary: This role is responsible for pre-Si verification and validation of complex SoCs with both high-speed custom and digital… more
- Broadcom (San Jose, CA)
- …and develop scalable and reusable Testbench environment using the framework of Verification Methodologies. . Drive Test plans for all features for Block/Core/SOC and ... and get to full Functional coverage and bring the Verification to closure . Debug Regression failures, analyze Functional...in an efficient way. . Lead the documentation of verification strategy including Test plans, Verification Environment,… more
- Broadcom (San Jose, CA)
- …Architect and develop scalable and re-usable testbenches, using the framework of the verification methodology . Build pseudo-random tests to verify and get to full ... Coverage gaps and improve tests to cover the gaps . Document verification strategy including Test plans, Verification Environment, pseudo-random tests, etc.… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …who want to make an impact on the world of technology. Senior Principal Design Engineer The Sr Principal Analog IC Designer is responsible for design and ... developing analog/mixed-signal IC circuit blocks, the architecture and initial concept/specification through final verification of conformance to customer… more
- Broadcom (San Jose, CA)
- …compute cores and CPUs. We are seeking a motivated and technically strong engineer to join our team. Job Description: Layout design of digital high-performance ... the blocks with best PPA (power/performance/area) Debug LVS/DRC/ERC errors with verification tool Analyze the trade-offs and performance implications of different… more
- Broadcom (San Jose, CA)
- …and device physics knowledge to help solve circuit design, layout, physical verification , and post-layout extraction challenges and problems. + Experience in all ... phases of CAD tools from evaluation, QA, test, release, and user support to documentation + Expert in Cadence Skill, Perl, Unix Shell and utilities + Excellent interpersonal, communication, and presentation skills, along with strong multi-tasking skills,… more
- Power Integrations (San Jose, CA)
- The role of the Principal Product Definition Engineer is to analyze customer requirements, create full application solutions and specify new integrated circuits ... In the process of specifying new integrated circuits, the Senior Systems Engineer will use advanced simulation techniques to develop algorithms and prototype… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …technical skills to enable semiconductor companies adopting Cadence solutions and associated IC design methodologies. The Application Engineer will work with ... The AE will support Cadence solutions with an emphasis on our leading Custom IC Virtuoso Studio platform. The successful engineer will work with customers,… more
- Capgemini (San Jose, CA)
- **About the job you're considering** We are seeking a Python Methodology Engineer to develop Python scripts that automate the setup, execution, and monitoring of ... IC characterization tests. **Your role** . Collaborate with test...their journey towards Intelligent Industry. Capgemini Engineering has 65,000 engineer and scientist team members in over 30 countries… more
- Power Integrations (San Jose, CA)
- Job Description: The Senior Failure Analysis Engineer will perform power supply or system level failure analysis to support RMA and internal/external customer ... include, but are not limited to, the following. + Debugging and functionality verification of AC/DC switching power supply modules in various topologies using Power… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …collaborative EDA professionals to deliver the best-in-class next-generation software for physical IC applications. The software engineer will work on complex ... world of technology. Cadence is seeking a Server Farm Engineer to join our team to support, manage, and...to highly complex problems in semiconductor and electronic design, verification , and analysis. We are looking for a recent… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …impact on the world of technology. Experience should include: + Deep understanding of IC layout on advanced node, 16nm or below, geometries. + Layout techniques for ... high speed routing, electromigration and power planning. + Expert at custom/analog IC physical implementation and automation. + A good understanding of parasitic RC… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …algorithms to extremely complex problems in semiconductor and electronic design, verification , and analysis. With its Sigrity platform, Cadence is the leader ... in providing software for IC package physical design and for analyzing power integrity,...Sigrity R&D team is looking for a talented software engineer who is ready to make a significant impact… more
- Broadcom (San Jose, CA)
- …**Job Description:** **Broadcom is looking for a senior level ASIC physical design engineer . In this highly visible role, you will be contributing to SerDes ... speed clock constraints and specification.** + **Good understanding of physical design verification methodology to debug LVS/DRC issues at the chip and block… more
- Broadcom (San Jose, CA)
- …experience is a plus + Working knowledge of 2.5D packaging technology and 3D stacked IC + Knowledge and use of various EDA offerings from major EDA suppliers in ... extraction and simulation, abstract and LEF/DEF generation, LVS/ERC checks, physical verification + Conducting design reviews & creating slides and other associated… more
- Celestica (San Jose, CA)
- …an unrelenting drive to find the way for our customers. Let's engineer the future together. Responsible for architecting, implementing, and supporting power system ... create and maintain the preferred list + DC relevant IC selection, create and maintain the preferred list +...bring up, debug, and validation in the lab. + Verification Write and execute test and DVT plans. **Experience:**… more
