- Ayar Labs (San Jose, CA)
- Engineer - ASIC Design Verification Location: San Jose (this is an on-site position) Summary: This role is responsible for pre-Si verification and validation ... blocks. You will work in a dynamic startup environment as part of a small IC design team. The ideal candidate is a hands-on self-starter who can craft design … more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and ... Amazon's Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that...signal routing - As a key member of the ASIC design team, you will implement and… more
- Amazon (Cupertino, CA)
- … design quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, ... a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in...rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze… more
- Google (Sunnyvale, CA)
- ASIC Design Verification and Methodology Engineer , Google Cloud _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, ... efficiency of chip execution by creating and deploying design platforms. As an ASIC Design Verification and Methodology Engineer , you will be the… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and ... services such as Amazon's Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set… more
- Google (Sunnyvale, CA)
- …model the custom accelerator ASICs. Build tools and infrastructure to help ASIC design verification, tapeout, and bring-up. Develop embedded CPU simulators ... Senior Staff Software Engineer , ASIC , Platforms Infrastructure Engineering _corporate_fare_...design and develop tools to update and debug ASIC firmware. Enable chip bring-up and hardware debugging. +… more
- Amazon (Cupertino, CA)
- …for in the United States. In Annapurna Labs we are at the forefront of hardware co- design not just in Amazon Web Services (AWS) but across the industry. The work we ... while also being deeply important to our customers. We design and build every component of our hardware and...is a fantastic choice. As a member of the Cloud -Scale Machine Learning Acceleration team you'll be responsible for… more
- Google (Sunnyvale, CA)
- Physical Design Flow and Methodology Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and ... an emphasis on computer architecture. + 10 years of experience in physical design flow and methodologies for high-performance ASIC /SoC projects. + Experience in… more
- Amazon (Cupertino, CA)
- …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze ... Proficient in programming/scripting languages (Perl, Python, C++) - Solid understanding of ASIC physical design , and methodologies including synthesis, place and… more
- Arrow Electronics (Santa Clara, CA)
- **Position:** RTL Design Engineer (eInfochips) **Job Description:** **Role: RTL Design Engineer ** **Location: San Jose CA (Remote)** **Experience: 10+ ... + Lead silicon bring-up activities, troubleshoot, and debug PCIe related issues. + ASIC Design and Development: + Design , implement, and verify… more
- Amazon (Cupertino, CA)
- …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new ... a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in...MS + 6yrs in EE/CS - 6+ years in ASIC Physical Design from - RTL-to-GDSII in… more
- Microsoft Corporation (Santa Clara, CA)
- …Datacenters based on our highly programmable data processing chip (DPU). As a Hardware Board Design Engineer , you will be responsible for the design & ... Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...& AI. We are looking for a **Senior Hardware Design Engineer ** to join our team! **Responsibilities**… more
- Amazon (Cupertino, CA)
- …machine learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud ... responsibilities - You will create and support innovative physical design methodology and CAD flows. - Develop cloud...in TCL, Perl, and/or Python - Solid understanding of ASIC physical design , physical design … more
- Google (Sunnyvale, CA)
- Hardware Design Engineer , Board and Systems _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and ... storage, networking, and machine learning hardware. As a hardware engineer in the board and system design ...ensure that customer goals are met with your systems, ASIC /FPGA, Software, and Verification teams to ensure proper verification… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …who want to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe Cadence IP ... - from the endpoint to the edge to the cloud . At Cadence we're helping set the standard on...memory subsystem verification and/or performance analysis* Strong knowledge of ASIC flow, RTL design in Verilog, System… more
- Google (Sunnyvale, CA)
- Staff Hardware Systems Design Engineer , Board and Systems _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Advanced** Experience owning outcomes and decision ... 6 years of experience working in a hardware systems design , or 5 years of experience with an advanced...SPI, etc. **About the job** As a Staff Hardware Engineer , you will work on Machine Learning/AI hardware systems… more
- Capgemini (San Jose, CA)
- …data structures, and algorithms. The ideal candidate will have experience in ASIC design and development within Linux-based environments. Proficiency in version ... and optimize data structures and algorithms to solve complex problems. + Support ASIC design and verification processes. + Develop and manage projects in… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …customers in a variety of markets - from the endpoint to the edge to the cloud . At Cadence we're helping set the standard on IP products that get integrated in SoCs ... that power the world's Data Centers, Automobiles, Cloud and Wireless Systems. We offer amazing opportunities to...High-Performance Culture at Cadence. As a Lead Technical Presales Engineer , you will use your knowledge of different memory… more
- Microsoft Corporation (Santa Clara, CA)
- …for passionate, high-energy engineers to help achieve that mission. As a Senior Silicon Engineer - ASIC verification in the Data Processing Unit team you will ... Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the...your career. We are looking for a **Senior Silicon Engineer ** to Join our team! **Responsibilities** + Lead key… more
- Google (Sunnyvale, CA)
- …related field, or equivalent practical experience. + 4 years of experience working in an ASIC or FPGA design technical environment, or 3 years of experience with ... FPGA Engineer , Platforms, Hardware _corporate_fare_ Google _place_ Sunnyvale, CA,...an advanced degree. + Experience with Register-Transfer Level design using Verilog or SystemVerilog. + Experience in the… more
