- Meta (Sunnyvale, CA)
- …efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , EDA Infrastructure Responsibilities: 1. Front End ... **Summary:** Meta is hiring ASIC EDA Infrastructure Engineers within our Infrastructure organization. We are looking for individuals with experience in … more
- NVIDIA (Santa Clara, CA)
- …the GPU in 1999 to reshape PC gaming and modern computer graphics. As an engineer in our EDA Workflow Optimization team, you will partner closely with our ... infrastructure . You will work with your team of EDA and software experts to build new infrastructure...compute) our chip engineers depend on. + Experience with ASIC , VLSI, CAD/ EDA or mixed signal design… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Network Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Google (Sunnyvale, CA)
- ASIC Design Verification and Methodology Engineer , Google Cloud _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving ... the efficiency of chip execution by creating and deploying design platforms. As an ASIC Design Verification and Methodology Engineer , you will be the catalyst… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide technical… more
- Google (Sunnyvale, CA)
- …of our physical design engineers and ensuring the high quality of results for all ASIC tapeouts. The AI and Infrastructure team is redefining what's possible. We ... Physical Design Flow and Methodology Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid**...and implement next generation physical design Electronic Design Automation ( EDA ), CAD tool workflows for ASIC development.… more
- NVIDIA (Santa Clara, CA)
- …Knowledge of DC/Transient, Cross corner PVT and Monte Carlo simulations. + Previous work in VLSI, ASIC , or EDA is a definite plus. + Ability to use the latest AI ... the world! We are currently looking for a Software/CAD engineer to join our team of dedicated engineers developing...+ Employ good software engineering practices to develop efficient EDA /CAD tools for chip development. + Build flows and… more
- Broadcom (San Jose, CA)
- …of 2.5D packaging technology and 3D stacked IC + Knowledge and use of various EDA offerings from major EDA suppliers in semiconductor industry for IP and chip ... **Job Description** + Provide design support for IP & ASIC to create robust designs in line with advanced...develops and supplies a broad range of semiconductor and infrastructure software solutions. For more information please visit our… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new ... the world. Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is seeking a versatile Hardware Engineer to join our Compute Hardware team. Our mission is backed by a massive hardware infrastructure . Our ... cutting-edge data centers affecting billions of users. **Required Skills:** Hardware Engineer Responsibilities: 1. Work with local and remote teams and suppliers,… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and ... Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of...MS + 6yrs in EE/CS - 6+ years in ASIC Physical Design from - RTL-to-GDSII in either 7nm,… more
- NVIDIA (Santa Clara, CA)
- …motivated, and committed. Ways to stand out from the crowd: + Previous work in VLSI, ASIC , or EDA is a definite plus + Experience with .lib characterization flow ... world! We are currently looking for a Senior Methodology Engineer to develop and support our CAD tooling in...improve efficiency + Build flows and methodology around vendor EDA tool and design collaterals to streamline design and… more
- Amazon (Cupertino, CA)
- Description Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses ... AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server platforms. Our… more
- Broadcom (San Jose, CA)
- …apply.** **Job Description:** Broadcom is looking for a senior level Digital Design Verification engineer . In this highly visible role you will be working on ASIC ... and digital behavioral model verification + Hands-on knowledge of standard industry EDA tools - Synopsys/Cadence + Experienced with GLS with & without parasitic… more