• Annapurna Labs (US) Inc. (Cedar Park, TX)
    …Europe, and Asia, and customers across all industries. We are seeking experienced System -on- Chip (SoC) Power Analysis Engineers to build the next generation of ... stages of the design, and developing power optimization techniques from SoC to complete system . These systems include accelerators such as AWS Inferentia and AWS… more
    JobGet (05/22/24)
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  • Annapurna Labs (US) Inc. (Cedar Creek, TX)
    …definition, design and validation of AWS next generation ML Chips, Cards and server integration . As a senior member of our platform development team, you will ... write/modify tests, debug and collect data.Key job responsibilitiesAs a senior member of the team, you will join a...teams, software engineers to deliver the next generation ML chip . In this position, you will have the opportunity… more
    JobGet (05/22/24)
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  • Senior Power Optimization Engineer,…

    Amazon (Austin, TX)
    …Europe, and Asia, and customers across all industries. We are seeking experienced System -on- Chip (SoC) Power Analysis Engineers to build the next generation of ... stages of the design, and developing power optimization techniques from SoC to complete system . These systems include accelerators such as AWS Inferentia and AWS… more
    Amazon (04/26/24)
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  • Senior Design Engineer

    Microsoft Corporation (Austin, TX)
    …Property (IP) microarchitecture specification, Register Transfer Level (RTL) design, synthesis, and System on Chip (SOC) integration on different subsystems. ... at work and beyond. We are looking for a ** Senior Design Engineer** to work in the dynamic Microsoft...Engineer** to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC) Silicon team. The… more
    Microsoft Corporation (05/22/24)
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  • Senior Firmware Engineer

    Microsoft Corporation (Austin, TX)
    …secure Azure infrastructure for Microsoft and their customers. We are looking for a ** Senior Firmware Engineer** with a background in system validation and debug ... each team produces their part and has experience with System -on-a- Chip (SoC) Architecture and Design, bring up...+ Drive, define, implement, and lead execution of firmware integration and validation test plans. + Be responsible for… more
    Microsoft Corporation (05/23/24)
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  • Senior ASIC Design Engineer, Project Kuiper

    Amazon (Austin, TX)
    …engineers to validate fixes and ensure design closure. - Facilitate seamless integration across Firmware, RTL, Platform Software, and Platform Drivers. - Develop ... of Project Kuiper's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways.… more
    Amazon (05/21/24)
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  • Sr. IC Packaging Engineer, Silicon Technology…

    SpaceX (Bastrop, TX)
    …assembly processes including material characterization and down-selection for wafer-level and chip -level systems + Develop new technologies and establish ... development + Familiarity with 2D, 2.5D, and/or 3D packaging integration + Packaging familiarity with flip- chip , BGA,...chip , BGA, fcCSP, WLCSP, fan out FO processes, system -in-package SiP, multi- chip modules MCM, wirebond, panel… more
    SpaceX (04/05/24)
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  • Principal Quality Engineer, Silicon Technology…

    SpaceX (Bastrop, TX)
    …with flip- chip , BGA, fcCSP, WLCSP, fan out FO processes, system -in-package SiP, multi- chip modules MCM, wirebond, panel level packaging, heterogenous ... and spacecraft to deploy Starlink, the world's most advanced broadband internet system . Starlink is the world's largest satellite constellation and is providing… more
    SpaceX (04/09/24)
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  • Serdes PHY Expert, Annapurna Labs

    Amazon (Austin, TX)
    …definition, design and validation of AWS next generation ML Chips, Cards and server integration . As a senior member of our platform development team, you will ... debug and collect data. Key job responsibilities As a senior member of the team, you will join a...teams, software engineers to deliver the next generation ML chip . In this position, you will have the opportunity… more
    Amazon (05/24/24)
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  • Physical Design Engineer - DSP

    Qualcomm (Austin, TX)
    …implementation of DSP. Work on activities related to synthesis. hard macro integration , placement, clock tree synthesis (CTS), routing, and overall physical design ... + Perform synthesis placement and create handoffs to top-level chip teams. + Lead the core level timing ECOs....influence over key organizational decisions (eg, is consulted by senior leadership to provide input on key decisions). +… more
    Qualcomm (04/26/24)
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