- Apple Inc. (San Francisco, CA)
- …that fosters engineering excellence, creativity, and innovation. Description As an Health Sensing ASIC Architect , you will help develop ASICS for new Sensors ... Responsibilities Conduct sensing system feasibility studies and system modeling Architect and define electrical interface for sensing systems Schematic design,… more
- Eridu Corporation (San Francisco, CA)
- …reality contact lens) . Position Overview We are looking for a highly experienced ASIC Architect to contribute to the definition and implementation of Eridu's ... functional specifications. Collaborate with chip and system microarchitects to align ASIC architecture with system-level goals for throughput, latency, and power… more
- Apple Inc. (San Francisco, CA)
- A leading technology company in San Francisco is looking for a Health Sensing ASIC Architect to develop ASICs for future products. The ideal candidate will have ... include conducting feasibility studies for sensing systems and defining requirements for ASIC design. This role offers a competitive salary range of $181,100 to… more
- Eridu Corporation (San Francisco, CA)
- A Silicon Valley hardware startup is seeking an experienced ASIC Architect to help define and implement leading networking products. The role involves ... ideal candidate will have over 10 years of experience in networking ASIC architecture, strong analytical skills, and a deep understanding of networking protocols.… more
- Eridu Corporation (San Francisco, CA)
- …RTL execution. Candidates should have an MSEE and over 15 years of ASIC /SoC RTL design experience, specifically in PCIe protocol design. You will develop ... high-performance PCIe solutions while collaborating with cross-functional teams. This role offers a competitive salary range of $210,000 - $275,000 based on your experience and qualifications. #J-18808-Ljbffr more
- OpenAI (San Francisco, CA)
- …SONiC NOS images from scratch, working across the Linux kernel, switch ASIC SAI/SDKs, platform drivers, control-plane services, and orchestration layers. You will ... AI fabrics. Integrate and configure Linux kernel components, device drivers, switch ASIC SDKs, and SAI layers. Bring up new switch platforms (thermal/fan control,… more
- Eridu Corporation (San Francisco, CA)
- …cutting‑edge Networking devices. Responsibilities Egress/Ingress Design : Design and architect solutions for high‑speed networking device, focusing on latency ... and Testing : Implement memory management designs on FPGA or ASIC platforms, ensuring compliance with industry standards and performance benchmarks. Conduct… more
- Eridu Corporation (San Francisco, CA)
- …cutting-edge Networking devices. Responsibilities: Packet Buffering Design: Design and architect solutions for high-speed networking chips, focusing on latency ... / arbitration design. Implementation and Testing: Implement designs on ASIC platforms, ensuring compliance with industry standards and performance benchmarks.… more
- Atlas Data Storage, Inc. (San Francisco, CA)
- …will be an essential member of our engineering team. You'll help architect , design, and implement high-performance software across our stack. Your responsibilities ... development (typescript, React or similar frameworks) Understanding of FPGA and ASIC integration Familiarity with data storage technologies Experience with cloud… more
- quadric.io, Inc (Burlingame, CA)
- …Electrical or Computer Engineering with a minimum of five years of CPU/GPU/ ASIC front-end design Proficiency in SystemC, SystemVerilog, or Verilog Strong background ... in computer architecture Knowledge of design techniques for low power digital design Knowledge of VCS & Verilog/C Co-Sim Experience in data-parallel hardware design for high-performance computing Experience in FPGA design is a plus Experience in logic… more
- quadric.io, Inc (Burlingame, CA)
- …in Electrical or Computer Engineering with a minimum of five years of CPU/GPU/ ASIC front-end design + Proficiency in SystemC, SystemVerilog, or Verilog + Strong ... background in computer architecture + Knowledge of design techniques for low power digital design + Knowledge of VCS & Verilog/C Co-Sim + Experience in data-parallel hardware design for high-performance computing + Experience in FPGA design is a plus +… more
