- JPMorgan Chase (Jersey City, NJ)
- …- Python co-simulation, C++ Strong knowledge of FPGA architecture design in VHDL / Verilog . + Experience in developing verification strategies and writing ... in Electronic Trading Technology is seeking an exceptional and experienced FPGA Verification Engineer to join our ultra-low latency direct market access team.… more
- JPMorgan Chase (Jersey City, NJ)
- …architecture and design in VHDL , Verilog + High speed, low latency FPGA design + Development of verification strategies and writing complex test benches + ... deep technical expertise and problem-solving methodologies to tackle a diverse array of challenges that span multiple technologies and applications. Job… more