- Google (Sunnyvale, CA)
- …+ Experience leading one or more aspects of physical design or physical design flow / methodology , to successful tape-outs and shipping silicon. + ... of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Physical Design Engineer on the chip implementation team, you… more
- NVIDIA (Santa Clara, CA)
- …our team with varied strengths today! What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. + ... and creative solutions to the state of the art physical design problems that are needed for...are needed for NVIDIA chips. + Participate in developing flow and tool methodologies for chip floorplan, power and… more
- NVIDIA (Santa Clara, CA)
- …to address them + Own front-end design quality checks and reviews to present the physical design team with high-quality RTL What we need to see: + BS/MS in ... NVIDIA is hiring a SOC/IP Methodology Engineer to help design and...or other industry-standard scripting languages + Hands-on experience with physical design and analysis tools from EDA… more
- NVIDIA (Santa Clara, CA)
- …aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most ... and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the...cells/memory/IO IP modeling and its usage in the ASIC flow . Hands-on experience in advanced CMOS technologies, design… more
- NVIDIA (Santa Clara, CA)
- …EDA tools from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical synthesis, placement, routing, ... + You will be responsible for all aspects of front-end design implementation methodologies (synthesis, formal-equivalence-checking), flow automation and… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. Be part of a diverse team creating NVIDIA's chip design methodology ! We're responsible for the Front-End Design ... of Python, Perl , Tcl, C/C++ + Knowledge or experience with logic synthesis, physical design , formal equivalence checking. + Proven track record developing flows… more
- Qualcomm (Santa Clara, CA)
- …define, develop and drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer, you will work with microarchitecture and RTL ... and also useful in enabling CPU timing infrastructure and methodology impacting multiple CPU projects in Qualcomm. You will...design automation using TCL/Perl/Python. + Familiar with digital flow design implementation RTL to GDS :… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …ASIC/IP tapeouts. Knowledge of the IP/SoC level timing closure flow and methodology . Strong command of synthesis, STA, design for test, and design ... will span across various aspects for the ASIC frontend flow , which includes RTL integration, maintain the timing constraint,...You will also be responsible for interfacing with the Physical Design team on STA, timing closure… more
- Amazon (San Diego, CA)
- …Edge that is powering the latest generation of Echo devices is looking for a Sr. Physical Design Engineer to continue to innovate on behalf of our customers. We ... & Responsibilities: - Includes definition and development of signoff methodology and corresponding implementation solution - Flow ...- Should be able to work closely with IP Design teams and Backend Physical Design… more
- NVIDIA (Santa Clara, CA)
- …to build complex GPU and Tegra chips and interface, directly with unit-level ASIC, Physical Design , CAD, Package Design , Software, DFT and other teams. ... design quality checks and reviews to present the physical design team with high-quality RTL. What...are creative, collaborative, and have a real passion for design methodology and automation, we want to… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... the DFT and quality process through the entire Implementation flow and post silicon validation phases with additional exposure...and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do… more
- Cisco (San Diego, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... the DFT and quality process through the entire Implementation flow and post silicon validation phases with additional exposure...and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do… more
- Qualcomm (San Diego, CA)
- …technology + Circuit Design + STA timing + Power analysis + Semi-custom design flow and methodology **Principal Duties and Responsibilities:** * Works ... across teams to align on important areas of feature development and ensure targets are met; ensures designs are innovative and compatible with other components. * Develops high-quality GPU system based on requirements that balance power with performance and… more
- ASRC Industrial Services (San Francisco, CA)
- …Analyze complex slug, pumping, dipole and tracer test results to interpret contaminant flow and transport and to design /optimize remedial systems. + Determine ... contaminant fate and transport characteristics, surface-groundwater interaction, vadose zone flow and transport, dewatering requirements, water supply evaluation, artificial… more
- SpaceX (Irvine, CA)
- …generation and verification and timing closure + Work closely with chip architecture, design verification, physical design , DFT, and power teams to ... + Experience with test modes, mode merging to optimize physical design implementation and STA Signoff. +... and timing closure + Deep understanding of ASIC design flow , top-down and bottom-up design… more
- Acxiom (Sacramento, CA)
- …within entire end to end solution. + Deep knowledge of Acxiom Delivery Methodology Design , Project management and Change Management procedures + Strong ... or solution enhancements for assigned Client with emphasis on solution design and business requirements. Ensures overall solution requirements and design… more
- Qualcomm (San Diego, CA)
- …system-level in 5nm, 4nm and beyond (process technologies). + You will be working with physical design team (and other teams) on timing closure, CAD teams, IP ... teams and Design Technology Teams for flow scripts/tools development...and Tempus. + You will facilitate and drive STA methodology for Qualcomm using PT-SI, Tempus and best in… more
- Qualcomm (Santa Clara, CA)
- …Responsibilities:** * Leverages advanced knowledge of computer architecture, micro-architecture, logic design , circuits, and/or physical design to develop ... a CAD Engineer focusing on the DV & Emulation methodology and support, you will work with RTL, architecture,... and support, you will work with RTL, architecture, design , DV, software and silicon verification users. Interfaces with… more
- AbbVie (South San Francisco, CA)
- …Traditional Database principles, developing Data Mapping artifacts, produce Solution & Design Documents. + Conduct & document results from Experimental Research, ... Vendor Evaluation, gathering user feedback, using MS-Word, Visio, Whiteboarding, developing Data Flow & Business Process flow diagrams based on use cases… more
- BD (Becton, Dickinson and Company) (Milpitas, CA)
- …support packages and bootloaders. . Develop, maintain, and extend automated build flow methodology . Develop and integrate SoC systems, specifically utilizing ... in SoC, Python, Yocto, and Petalinux. Your primary responsibility will be to design , develop, test, and deploy SoC FPGA solutions that meet our rigorous performance… more