- NVIDIA (Santa Clara, CA)
- …our team with varied strengths today! What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. + ... includes developing unique and creative solutions to the state of the art physical design problems that are needed for NVIDIA chips. + Participate in developing… more
- SpaceX (Irvine, CA)
- Sr. ASIC Physical Design Methodology /CAD Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity ... goal of enabling human life on Mars. SR. ASIC PHYSICAL DESIGN METHODOLOGY /CAD ENGINEER (SILICON...or Irvine, CA COMPENSATION AND BENEFITS: Pay range: ASIC Engineer/ Senior : $160,000.00 - $220,000.00/per year Your actual level and… more
- NVIDIA (Santa Clara, CA)
- …aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most ... human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive...sophisticated strategies of signing off timing in design for world-class silicon performance. + Develop tools, and… more
- NVIDIA (Santa Clara, CA)
- …EDA tools from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical synthesis, placement, routing, ... We are looking for a Senior CPU Implementation Methodology Engineer to...out from the crowd: + Prior CPU experience in physical implementation methodology + Proficiency in Perl,… more
- NVIDIA (Santa Clara, CA)
- …+ Engage with EDA providers on 3D-IC EDA feature requirements and 3D-IC design methodology . + Design optimization of 3D advanced silicon/package ... 3D-IC Test Chips validation of 3D-IC technology platforms and design methodology . What we need to see:...Familiarity with Machine Learning/Deep Learning + Experience in other Physical Design methodologies such as P&R, DFT,… more
- NVIDIA (Santa Clara, CA)
- … needs to balance high frequency clocks with power, DFT, noise, circuit and physical design constraints. What you'll be doing: + Develop Clock RTL generation ... Methodology engineer with proven experience in high-speed logic design and verification. In order to support high frequency...solutions for supporting high speed Clocking. + Understand the physical aspects of the chip and develop better clock… more
- NVIDIA (Santa Clara, CA)
- …into a single chip. Your role will be cross-disciplinary, working with software, ASIC design , verification, physical design , VLSI and platform teams. Our SoC ... We are now looking for a Senior Hardware SoC Architect for our Tegra team!...+ Hardware architecture end-to-end lifecycle ownership. + Drive Architecture/Software/Hardware co- design and collaboration on features set. + Perform performance,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior ASIC Physical Design PPA (Performance, Power, Area) Engineer to join our dynamic and growing team. If you are ... work, to amplify human inventiveness and intelligence. What you'll be doing: + Drive physical design and timing of high-frequency and low-power designs + Focus… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Physical Design and Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part of ... inventiveness and intelligence. What you'll be doing: + Drive physical design and timing of high-frequency and...experience to improve the convergence flows working with the Methodology Team. What we need to see: + BS… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated ASIC Physical Design and Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part ... inventiveness and intelligence. What you'll be doing: + Drive physical design and timing of high-frequency and...experience to improve the convergence flows working with the Methodology Team. What we need to see: + BS… more
- Qualcomm (San Diego, CA)
- … Design Engineer. This team is responsible for road mapping, architecting, design methodology , design implementation and verification for all Qualcomm ... hard macro block placement, padring, RDL and bump pattern/assignment + System level co- design methodology of IC, Package and PCB/Board + Concept analysis for… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Compiler, ICC2 and Primetime. + Working closely with R&D on tools and methodology improvements + Create and contribute technical content for Cadence Online Support ... The Position Requirements are + Bachelor's degree with at least 3-6 years of design /EDA experience or Master's degree with at least 4 years of experience. Master's… more
- Stanford Health Care (Palo Alto, CA)
- …responsible for overseeing the management of the team in curriculum development, teaching methodology design , and delivery of training as required by the project ... **This is a Stanford Health Care job.** The Learning Design and Evaluation Sr. Manager at Stanford Medicine is...asset of Stanford Health Care. **A Brief Overview** The Senior Manager - Informatics Education is responsible for leading… more
- Global Foundries (Santa Clara, CA)
- …teams involved. Essential Responsibilities: + Knowledge of SoCs, digital and AMS design methodology , Foundation IPs, IC manufacturing and process technology + ... is a leading full-service semiconductor foundry providing a unique combination of design , development, and fabrication services to some of the world's most inspired… more
- Humana (Sacramento, CA)
- …availability, resource utilization and innovation. This person will provide cloud network design , engineering and administrative support of both physical and ... part of our caring community and help us put health first** The Senior Cloud Solutions Engineer (Network) develops and evaluates cloud network performance criteria… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. What you'll be doing: + You will drive physical design of high-frequency and low-power CPUs, GPUs, SoCs at block ... We are now looking for a motivated Senior ASIC Engineer, Timing to join our dynamic...quality checks, etc. + Help in all aspects of physical design , such as driving timing convergence,… more
- Ventura County (Ventura, CA)
- Staff/ Senior /Lead Psychologist Print (https://www.governmentjobs.com/careers/ventura/jobs/newprint/3705816) Apply Staff/ Senior /Lead Psychologist Salary ... license. They must perform their duties under the direction of a licensed Senior Psychologist and require supervision under the current rules and regulations of the… more
- NVIDIA (Santa Clara, CA)
- …or Computer Engineering or equivalent experience. + 8+ years experience in Physical design /Timing. + Experience in full-chip/sub-chip Static Timing Analysis ... as part of the advanced technology team to optimize design tradeoffs and methodology on next generation...of multiplexed scan logic and constraints. + Expertise in physical design , optimization, and ECO implementation eg… more
- NVIDIA (Santa Clara, CA)
- …for NVIDIA's front-end ASIC software including RTL synthesis, equivalence checking, and early physical design and methodology for all of NVIDIA's ... algorithms, data structures, testing + Familiarity with Verilog and ASIC and physical design along with experience in commercial EDA tools + Strong proficiency… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. Be part of a diverse team creating NVIDIA's chip design methodology ! We're responsible for the Front-End Design ... of Python, Perl , Tcl, C/C++ + Knowledge or experience with logic synthesis, physical design , formal equivalence checking. + Proven track record developing flows… more