- Qualcomm (San Diego, CA)
- …seeking candidate whose primary role is to implement and validate low power design intent requirements at the SoC -level. The role also expands to power ... smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital...Work with design verification in validating low power design featurs at SoC … more
- Google (Sunnyvale, CA)
- …machinery that goes into our cutting-edge data centers affecting millions of Google users. As a SoC Design Engineer , you will join a team working on SoC ... system hardware, and other cross-functional teams + Experience defining SoC IP interfaces and methodologies. Experience designing SOC...power all of Google's services. As a Hardware Engineer , you design and build the systems… more
- SpaceX (Irvine, CA)
- Sr. SoC Design Engineer , System Integration (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is ... ultimate goal of enabling human life on Mars. SR. SOC DESIGN ENGINEER , SYSTEM INTEGRATION...to solve complex problems including clock domain crossings and power optimization + ASIC/ SoC system integration experience… more
- SpaceX (Sunnyvale, CA)
- Principal SOC /ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is ... ultimate goal of enabling human life on Mars. PRINCIPAL SOC /ASIC PHYSICAL DESIGN ENGINEER (SILICON... team to drive architectural feasibility studies, develop timing, power and area design targets, and explore… more
- Google (Sunnyvale, CA)
- …software and networking technologies that power all of Google's services. As a Hardware Engineer , you design and build the systems that are the heart of the ... ASIC design methodologies for clock domain checks, reset checks and low power design . + Experience with silicon, emulation, FPGA validation and debug,… more
- NVIDIA (Santa Clara, CA)
- …design and methodologies. What you'll be doing: + Be an integral part of the SOC Design team to develop and improve our RTL top-level assembly process and ... day-to-day interaction with front-end RTL unit designers, back-end physical design engineers, DFT engineers, power architects, software...years of shown relevant industry work experience in chip design , specializing in SOC integration and … more
- Google (Sunnyvale, CA)
- …that goes into our cutting-edge data centers affecting millions of Google users. As a SoC Physical Design Engineer , you will collaborate with Functional ... technologies that power all of Google's services. As a Hardware Engineer , you design and build the systems that are the heart of the world's largest… more
- Meta (Sunnyvale, CA)
- …from transistors, through architecture, to firmware, and algorithms.We are seeking an SoC Modeling ASIC Engineer to support C++/Python modeling and software ... and mapping software pipelines to the dedicated hardware accelerators. **Required Skills:** SoC Modeling ASIC Engineer Responsibilities: 1. Analyze the software… more
- SpaceX (Sunnyvale, CA)
- … intent verification and post synthesis timing validation flows + Execute low power design and physical synthesis, deploying knowledge of unified power ... SOC /ASIC Synthesis & Front-End STA Engineer ...closely with chip architecture, design verification, physical design , DFT, and power teams to achieve… more
- Google (Sunnyvale, CA)
- …software and networking technologies that power all of Google's services. As a Hardware Engineer , you design and build the systems that are the heart of the ... affecting millions of Google users. As an ASIC and SoC System Level Test Engineer , you will...product engineering activities. You will work with ASIC Architecture, Design , and Pre-silicon SoC Verification teams to… more
- Qualcomm (Santa Clara, CA)
- …Power verification team, you will be responsible for verifying the ASIC low power design , architecture and micro-architecture of by applying advanced low ... Engineering **General Summary:** We are looking for an ASIC Design Verification Engineer with strong CPU, ASIC... and verification fundamentals to work in Qualcomm's Global SOC team. This position offers the rare opportunity to… more
- Qualcomm (San Diego, CA)
- …3 years of experience is required and proficiency in handling tools such as Design compiler, Fusion compiler, Primetime, Conformal low power , LEC. Scripting ... + Work closely with RTL design , physical design teams to optimize area, performance and power...design constraints to achieve timing closure of complex soc cores. + Tabulate metrics results for QOR comparison.… more
- Google (Mountain View, CA)
- …software and networking technologies that power all of Google's services. As a Hardware Engineer , you design and build the systems that are the heart of the ... on edge devices. + Knowledge of data-flows within the SoC , accelerators (eg, ML, video, audio, graphics), CPU and...infrastructure. You develop from the lowest levels of circuit design to large system design and see… more
- Qualcomm (Santa Clara, CA)
- …Integrated Wireless Technology team you will be working on WiFi (802.11x) technology, SOC Design , Low Power micro-architecture, Power ... and power correlation. + Experience in SoC low power micro-architecture, low power design and methodology, Power Intent/Implementation, power … more
- Qualcomm (San Diego, CA)
- …level sim, synthesis, timing/STA, UPF + Strong working knowledge in the entire low power , high performance ASIC/ SoC design flows (micro-architecture, RTL ... high performance ASIC designs, and, ability to execute critical power analysis of critical design IPs for...This is a great opportunity to join a fast-paced SoC team responsible for development of next Generation, high… more
- Qualcomm (San Diego, CA)
- …and Optimization, Performance Power and Area modeling and optimization, SOC Design implementation /methodology, Synthesis, Semi-custom design flow ... of Low Power implementation and methodology. The Power Implementation Engineer will work in QUALCOMMs... Power Analysis and Estimation, RTL and Synthesis Power Minimization, Power Intent design … more
- Qualcomm (Folsom, CA)
- …with various bus protocols like AHB, AXI, SPMI, I2C, SPI + Experience in low power design methodology and clock domain crossing designs + Experience in Spyglass ... connected future for all. Candidate will be responsible for design /developing next generation power control systems. Candidate... using Verilog/SV. Integrate and deliver complex subsystem to SoC + Design and implement defined tasks… more
- Leidos (San Diego, CA)
- …Innovations Center (LInC) at Leidos currently has an opening for a mid-level hardware design engineer to support a portfolio of programs in San Diego developing ... IP and DFT configurations + Provide technical guidance and subcontractor oversight throughout SoC design process to include, supervising design activities… more
- Google (Mountain View, CA)
- …experience. + 5 years of experience with SoC Integration focused on low power design . + Experience with new process technology based SoC integration ... an emphasis on computer architecture. + Experience in System-on-a-Chip ( SoC ) integration, including 2.5D and 3 Dimensional Integrated Circuit...power all of Google's services. As a Hardware Engineer , you design and build the systems… more
- Qualcomm (San Diego, CA)
- …- Bachelor's degree in Science, Engineering, or related field. - 7+ years of power design , power management & power architecture experience. ... smarter, connected future for all. As a Qualcomm GPU Engineer , you may architect, design , implement, verify,...requirements for maximizing PPA under high performance constraints - SOC & Chipset Power , Thermal, Reliability &… more