- Advanced Micro Devices (San Jose, CA)
- …collaborative, and inclusive of diverse perspectives. AMD together we advance_ The Role As a verification engineer in the AECG Group, you will help bring to life ... cutting-edge FPGA , ASICs for variety of target customers. As a...passion for modern, complex IP architectures, digital design, and verification in general. You are a team player who… more
- Advanced Micro Devices (San Jose, CA)
- A leading technology company in San Jose is seeking a Verification Engineer to work on cutting-edge FPGA and ASIC designs. The role requires strong skills in ... IP level ASIC verification , excellent communication, and problem-solving abilities. You will collaborate with cross-functional teams to ensure high quality in design… more
- SQL Pager LLC (San Jose, CA)
- A leading company in semiconductor technology is seeking a VLSI Verification Engineer who will collaborate with design teams and develop verification ... environments. The ideal candidate has a strong background in ASIC/ FPGA verification , advanced knowledge of System Verilog, and is skilled in both C/C++ and… more
- Compunnel, Inc. (Mountain View, CA)
- The FPGA Verification Engineer will be responsible for verifying FPGA designs using advanced methodologies and tools. This role requires strong expertise ... verification tools, along with excellent debugging and problem-solving skills. The engineer will work independently on complex verification tasks and… more
- Compunnel, Inc. (Mountain View, CA)
- A leading technology firm seeks a skilled FPGA Verification Engineer in Mountain View. This role involves verifying FPGA designs with advanced ... UVM, and debugging skills. The ideal candidate will develop verification plans, utilize industry-standard tools, and collaborate with cross-functional teams… more
- SQL Pager LLC (San Jose, CA)
- …years or MSEE with 1+ years experience Advanced knowledge of standard ASIC/ FPGA verification flows including simulation, testbench development, and post silicon ... and understand specifications / architectures / micro-architectures Define and review verification test plans Develop block level and chip level verification… more
- Kubelt (Alameda, CA)
- …block diagrams, interface definitions, and design specifications Develop and enhance FPGA verification workflows, utilizing simulation and formal verification ... to build on via Science Foundry. We are seeking a highly skilled and motivated FPGA /Firmware Engineer to join our team and take ownership of architecting and… more
- FHLB Des Moines (San Jose, CA)
- Senior Engineer II - Product page is loaded## Senior Engineer II - Productlocations: CA - San Jose - 3850 N. First Sttime type: Full timeposted on: Posted ... stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential....Forbes, Bay Area News and Phoenix Business Journal. The FPGA Business Unit (formerly Actel, with a 35+ year… more
- Lattice (San Jose, CA)
- …Engineering team has embarked upon to date. We are validating building blocks in FPGA on board level to ensure functionality and performance aspect of Design intent. ... FPGA consists of various IPs as a building block...DSP, Fabric, I/O etc. As a Silicon Design Validation engineer , you will have an opportunity to learn and… more
- FLIR Systems, Inc. (Milpitas, CA)
- Staff Logic Design Engineer page is loaded## Staff Logic Design Engineerlocations: US - Milpitas, CAtime type: Full timeposted on: Posted 3 Days Agojob requisition ... and networking.**Role Overview**We are looking for a top-notch Staff Logic Design engineer who has the right composition of knowledge, experience, team play, spirit… more
- Altera (San Jose, CA)
- …Participate in timing, power, EM/IR integrity, signal/power noise, and DRC/LVS/ERC verification for sign-off readiness.* Integrate FPGA -specific physical design ... .# **Job Details:** ## **Job Description: About the Role:**As a Physical Design Engineer at Altera, you will play a critical role in the backend implementation… more
- Theconstructsim (Milpitas, CA)
- …Lint/CDC/DFT checks; Synthesis & supporting timing‑closure; Contribute to and support Verification ; Supporting Firmware and FPGA teams; Silicon bring‑up. Ensure ... time off Relocation bonus Vision insurance Job Title: Front-End ASIC Design Engineer - Milpitas, CA Responsibilities Support customer's design through all phases of… more
- Theconstructsim (Milpitas, CA)
- …Lint/CDC/DFT checks; Synthesis & supporting timing‑closure; Contribute to and support Verification ; Supporting Firmware and FPGA teams; Silicon bring‑up. Ensure ... Front-End ASIC Design Engineer Milpitas, CA Description Milpitas, CA Benefits 401(k)...and verification ; high‑speed peripheral interfaces such as CSI, HDMI/DP, I3C, USB, PCIe; Machine‑learning / AI; FPGA .… more
- Theconstructsim (Milpitas, CA)
- …Lint/CDC/DFT checks; Synthesis & supporting timing-closure; Contribute to and support Verification ; Supporting Firmware and FPGA teams; Silicon bring-up. Ensure ... Job Title: Front-End ASIC Design Engineer Milpitas, CA Responsibilities Support customer's design through...or DSP; SoC Memory hierarchy; NoC/Fabric; low-power design and verification ; high-speed peripheral interfaces such as CSI, HDMI/DP, I3C,… more
- Theconstructsim (Milpitas, CA)
- …Lint/CDC/DFT checks; Synthesis & supporting timing‑closure; Contribute to and support Verification ; Supporting Firmware and FPGA teams; Silicon bring‑up. Ensure ... Description We are seeking a Front-End SoC/ASIC Design Engineer for our SoC business unit. Responsibilities Support customer's design through all phases of ASIC… more
- Analog Group (San Jose, CA)
- …and network equipment. Job Function: Digital Design (RTL design): ASIC or FPGA from concept to implementation. Digital Verification : Development test plans, ... The Sr. Digital Design Engineer candidate must have demonstrated success in digital...target schedule. Qualifications: 3-5 years' experience in design plus verification of ASIC or FPGA . Strong knowledge… more
- Renesas Electronics Corporation (San Jose, CA)
- …volatile/non-volatile memory IP selection, partitioning of hardware/firmware, RTL design, verification , FPGA prototyping, DFT, and IC qualification. ... in a Mixed-Signal Integrated Circuit HW/SW partitioning Work with firmware team and FPGA team on debugging and emulation Work with Product, Test, and Applications… more
- Cadence Design Systems (San Jose, CA)
- Application Engineer page is loaded## Application Engineerlocations: SAN JOSEtime type: Full timeposted on: Posted Todayjob requisition id: R52105## **At Cadence, we ... make an impact on the world of technology.**Join our elite application engineering team for verification to work closely with the best AEs, PEs and R&D in EDA at a… more
- Eridu Corporation (San Francisco, CA)
- …lens). Position Overview We are seeking a highly skilled and motivated Emulation Engineer to join our hardware development team. The ideal candidate will be ... responsible for building and deploying emulation and FPGA models from RTL designs using industry‑standard tools and methodologies. This role involves close… more
- Eridu Corporation (San Francisco, CA)
- …first augmented reality contact lens). Position Overview We are seeking an RTL Engineer to help define and implement our industry‑leading Networking IC. If you're a ... support. Implementation and Testing : Implement memory management designs on FPGA or ASIC platforms, ensuring compliance with industry standards and performance… more
