- Broadcom (San Jose, CA)
- …Broadcom's ASIC Product Division is seeking candidates for HBM/DDR/SERDES Verification Lead Engineer position at our San Jose, California Development ... We are seeking a highly skilled HBM and SerDes DFT Verification Engineer to join our dynamic...of our HBM, DDR and SerDes designs through comprehensive Design for Test ( DFT ) verification strategies. You… more
- Broadcom (San Jose, CA)
- …you apply.** **Job Description:** Broadcom's CSG division is seeking candidate for a DFT lead position. The successful candidate will be responsible for leading ... most complex and cutting edge network switching ASIC DFx ( Design for Test/debug & manufacturability) from DFT ...verbal and written communication skills. + Must be self-driven engineer with good project management and organizational skills to… more
- General Motors (Mountain View, CA)
- … and development of our vehicle displays hardware. In this role, the Senior Hardware Design Engineer - Display Development will be responsible for the technical ... supplies, SoCs, MCUs, SerDes interfaces, network devices, etc. + Lead design for manufacturing (DFM), design...manufacturing (DFM), design for assembly (DFA), and design for testing ( DFT ) + Drive the… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …who want to make an impact on the world of technology. Job Title: Lead Application Engineer Location: Tampere, Finland Reports to: AE Director Job Overview: ... Cadence EDA tools for Synthesis, Logical Equivalency Checking (LEC), Design -for-Test ( DFT ), Place & Route and Static...questions, and discussions for a given customer engagement + Lead technical discussions with customers and be the primary… more
- Cisco (San Jose, CA)
- …success of our optical transceiver products. As an ATE Test Development Engineer , you'll work closely with cross-functional teams-including design , product ... our customers worldwide. **Your Impact** As an ATE Test Engineer , you will play a key role in ensuring...transceiver products at wafer and CoCoS levels. + Influence NPI/ design phases to optimize DFT /DFM, test coverage,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …innovating for the most advanced companies in the world. Through Cadence's Electronic Design Automation (EDA) products, we've worked with a wide range of customers, ... in Synthesis, P&R, and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn their design concepts into reality. The greater… more
- Broadcom (San Jose, CA)
- … capable of leading external and internal cross-functional teams in areas such as physical design , STA, DFT , and packaging? Have you taped out so many chips that ... Our ASIC products division is looking for a senior engineer to guide Customer teams designing challenging chips in...design verification, DRC, logic synthesis + Knowledge of DFT methods including scan, memory BIST and repair **Education… more
- Cisco (San Jose, CA)
- …crafting cutting edge next generation networking chips. **Your Impact** You will be the lead to drive the DFT /DFx and quality process through the early product ... **Key Responsibilities:** + Responsible for development of the comprehensive Design -for-Test ( DFT ) & DFx solutions and architectures...screening, in-system test, debug and diagnostics needs of the design . + Lead the RTL implementation from… more