- Cadence Design Systems, Inc. (Cary, NC)
- … SoC/ASIC Digital Design Engineer with experience in Design for Test ( DFT ). Ability to lead from DFT Architecture to Silicon Debug is required. ... Design with focus on Design for Test ( DFT ) + Should be able to lead DFT in projects from architecture to silicon debug + Should possess intimate… more
- Microsoft Corporation (Raleigh, NC)
- …Intellectual Property ( VIP Design ) , Design Verification, Validation, Design for testing ( DFT ), Emulation, Design Synthesis, RTL Power Analysis, ... Engineering and Solutions Team is looking to hire a ** Senior Silicon Engineer** to join our Central Front-End Tools,...common FE methodologies for SoC and Intellectual Property (IP) design . + Be the go-to- lead in your… more