• Qualcomm (San Diego, CA)
    … solutions for the Snapdragon chips powering billions of mobile devices. The position requires Signoff Static Timing Analysis (STA) knowledge, with CAD ... to reduce conservatism in Signoff . Responsibilities will include: Improving the Signoff Timing methodology for diverse Mobile, Compute, AI, IoT Snapdragon… more
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  • Qualcomm (San Diego, CA)
    …for the Snapdragon chips powering billions of mobile devices. The position requires Signoff Timing and spice simulation experience, with CAD development skills ... of STA features and Timing concepts. 2-6 years of experience in Signoff Timing of SoCs at either top-level or block-level. 2-6 years of experience with… more
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  • Qualcomm (San Diego, CA)
    …to join the Global CAD team within the Engineering Group. The role focuses on Signoff Timing and spice simulation with CAD development to define and develop ... of STA features and Timing concepts. 2-6 years of experience in Signoff Timing of SoCs at either top-level or block-level. 2-6 years of experience with… more
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  • Arm Limited (San Diego, CA)
    timing signoff modes and constraints and familiarity with Synthesis and Static Timing Analysis . Experience in validating and supporting DFT timing ... to support DFT RTL level insertion, synthesis and scan insertion, place-and-route, and static - timing - analysis and timing closure. Participate in ATE… more
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  • Qualcomm (San Diego, CA)
    …ASIC/VLSI design tools and flows Strong programming skills in Python Hands‑on experience with static timing analysis (STA) tools, eg, PrimeTime and Tempus ... of the Global SOC organization and is responsible for STA methodology and signoff , foundry technology enablement and analysis , design automation and internal and… more
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  • Apple Inc. (San Diego, CA)
    …Collaborating with other teams such as physical design verification, RC extraction, IR and static timing analysis (STA). Working directly with EDA tool ... high performance and low power implementation flows. Understanding of some of the analysis involved in Physical Design - extraction, timing , noise, physical… more
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